STM CMSIS

Macros

#define ADC_SAMPLETIME_3CYCLES   ((uint32_t)0x00000000U)
 
#define ADC_SAMPLETIME_15CYCLES   ((uint32_t)ADC_SMPR1_SMP10_0)
 
#define ADC_SAMPLETIME_28CYCLES   ((uint32_t)ADC_SMPR1_SMP10_1)
 
#define ADC_SAMPLETIME_56CYCLES   ((uint32_t)(ADC_SMPR1_SMP10_1 | ADC_SMPR1_SMP10_0))
 
#define ADC_SAMPLETIME_84CYCLES   ((uint32_t)ADC_SMPR1_SMP10_2)
 
#define ADC_SAMPLETIME_112CYCLES   ((uint32_t)(ADC_SMPR1_SMP10_2 | ADC_SMPR1_SMP10_0))
 
#define ADC_SAMPLETIME_144CYCLES   ((uint32_t)(ADC_SMPR1_SMP10_2 | ADC_SMPR1_SMP10_1))
 
#define ADC_SAMPLETIME_480CYCLES   ((uint32_t)ADC_SMPR1_SMP10)
 

Detailed Description