STM CMSIS
PWR PVD detection level

Macros

#define PWR_PVDLEVEL_0   PWR_CR_PLS_LEV0
 
#define PWR_PVDLEVEL_1   PWR_CR_PLS_LEV1
 
#define PWR_PVDLEVEL_2   PWR_CR_PLS_LEV2
 
#define PWR_PVDLEVEL_3   PWR_CR_PLS_LEV3
 
#define PWR_PVDLEVEL_4   PWR_CR_PLS_LEV4
 
#define PWR_PVDLEVEL_5   PWR_CR_PLS_LEV5
 
#define PWR_PVDLEVEL_6   PWR_CR_PLS_LEV6
 
#define PWR_PVDLEVEL_7
 

Detailed Description

Macro Definition Documentation

◆ PWR_PVDLEVEL_7

#define PWR_PVDLEVEL_7
Value:
PWR_CR_PLS_LEV7/* External input analog voltage
(Compare internally to VREFINT) */
#define PWR_CR_PLS_LEV7
Definition: stm32f401xc.h:2140