|
|
#define | TIM_DMABASE_CR1 (0x00000000U) |
| |
|
#define | TIM_DMABASE_CR2 (0x00000001U) |
| |
|
#define | TIM_DMABASE_SMCR (0x00000002U) |
| |
|
#define | TIM_DMABASE_DIER (0x00000003U) |
| |
|
#define | TIM_DMABASE_SR (0x00000004U) |
| |
|
#define | TIM_DMABASE_EGR (0x00000005U) |
| |
|
#define | TIM_DMABASE_CCMR1 (0x00000006U) |
| |
|
#define | TIM_DMABASE_CCMR2 (0x00000007U) |
| |
|
#define | TIM_DMABASE_CCER (0x00000008U) |
| |
|
#define | TIM_DMABASE_CNT (0x00000009U) |
| |
|
#define | TIM_DMABASE_PSC (0x0000000AU) |
| |
|
#define | TIM_DMABASE_ARR (0x0000000BU) |
| |
|
#define | TIM_DMABASE_RCR (0x0000000CU) |
| |
|
#define | TIM_DMABASE_CCR1 (0x0000000DU) |
| |
|
#define | TIM_DMABASE_CCR2 (0x0000000EU) |
| |
|
#define | TIM_DMABASE_CCR3 (0x0000000FU) |
| |
|
#define | TIM_DMABASE_CCR4 (0x00000010U) |
| |
|
#define | TIM_DMABASE_BDTR (0x00000011U) |
| |
|
#define | TIM_DMABASE_DCR (0x00000012U) |
| |
|
#define | TIM_DMABASE_OR (0x00000013U) |
| |