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STM CMSIS
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Macros | |
| #define | TIM_TRGO_RESET ((uint32_t)0x00000000U) |
| #define | TIM_TRGO_ENABLE (TIM_CR2_MMS_0) |
| #define | TIM_TRGO_UPDATE (TIM_CR2_MMS_1) |
| #define | TIM_TRGO_OC1 ((TIM_CR2_MMS_1 | TIM_CR2_MMS_0)) |
| #define | TIM_TRGO_OC1REF (TIM_CR2_MMS_2) |
| #define | TIM_TRGO_OC2REF ((TIM_CR2_MMS_2 | TIM_CR2_MMS_0)) |
| #define | TIM_TRGO_OC3REF ((TIM_CR2_MMS_2 | TIM_CR2_MMS_1)) |
| #define | TIM_TRGO_OC4REF ((TIM_CR2_MMS_2 | TIM_CR2_MMS_1 | TIM_CR2_MMS_0)) |