STM CMSIS
stm32f4xx_hal_adc_ex.h
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1 
38 /* Define to prevent recursive inclusion -------------------------------------*/
39 #ifndef __STM32F4xx_ADC_EX_H
40 #define __STM32F4xx_ADC_EX_H
41 
42 #ifdef __cplusplus
43  extern "C" {
44 #endif
45 
46 /* Includes ------------------------------------------------------------------*/
47 #include "stm32f4xx_hal_def.h"
48 
57 /* Exported types ------------------------------------------------------------*/
74 typedef struct
75 {
76  uint32_t InjectedChannel;
79  uint32_t InjectedRank;
91  uint32_t InjectedOffset;
107  uint32_t AutoInjectedConv;
129 
133 typedef struct
134 {
135  uint32_t Mode;
137  uint32_t DMAAccessMode;
139  uint32_t TwoSamplingDelay;
142 
147 /* Exported constants --------------------------------------------------------*/
155 #define ADC_MODE_INDEPENDENT ((uint32_t)0x00000000U)
156 #define ADC_DUALMODE_REGSIMULT_INJECSIMULT ((uint32_t)ADC_CCR_MULTI_0)
157 #define ADC_DUALMODE_REGSIMULT_ALTERTRIG ((uint32_t)ADC_CCR_MULTI_1)
158 #define ADC_DUALMODE_INJECSIMULT ((uint32_t)(ADC_CCR_MULTI_2 | ADC_CCR_MULTI_0))
159 #define ADC_DUALMODE_REGSIMULT ((uint32_t)(ADC_CCR_MULTI_2 | ADC_CCR_MULTI_1))
160 #define ADC_DUALMODE_INTERL ((uint32_t)(ADC_CCR_MULTI_2 | ADC_CCR_MULTI_1 | ADC_CCR_MULTI_0))
161 #define ADC_DUALMODE_ALTERTRIG ((uint32_t)(ADC_CCR_MULTI_3 | ADC_CCR_MULTI_0))
162 #define ADC_TRIPLEMODE_REGSIMULT_INJECSIMULT ((uint32_t)(ADC_CCR_MULTI_4 | ADC_CCR_MULTI_0))
163 #define ADC_TRIPLEMODE_REGSIMULT_AlterTrig ((uint32_t)(ADC_CCR_MULTI_4 | ADC_CCR_MULTI_1))
164 #define ADC_TRIPLEMODE_INJECSIMULT ((uint32_t)(ADC_CCR_MULTI_4 | ADC_CCR_MULTI_2 | ADC_CCR_MULTI_0))
165 #define ADC_TRIPLEMODE_REGSIMULT ((uint32_t)(ADC_CCR_MULTI_4 | ADC_CCR_MULTI_2 | ADC_CCR_MULTI_1))
166 #define ADC_TRIPLEMODE_INTERL ((uint32_t)(ADC_CCR_MULTI_4 | ADC_CCR_MULTI_2 | ADC_CCR_MULTI_1 | ADC_CCR_MULTI_0))
167 #define ADC_TRIPLEMODE_ALTERTRIG ((uint32_t)(ADC_CCR_MULTI_4 | ADC_CCR_MULTI_3 | ADC_CCR_MULTI_0))
168 
175 #define ADC_DMAACCESSMODE_DISABLED ((uint32_t)0x00000000U)
176 #define ADC_DMAACCESSMODE_1 ((uint32_t)ADC_CCR_DMA_0)
177 #define ADC_DMAACCESSMODE_2 ((uint32_t)ADC_CCR_DMA_1)
178 #define ADC_DMAACCESSMODE_3 ((uint32_t)ADC_CCR_DMA)
186 #define ADC_EXTERNALTRIGINJECCONVEDGE_NONE ((uint32_t)0x00000000U)
187 #define ADC_EXTERNALTRIGINJECCONVEDGE_RISING ((uint32_t)ADC_CR2_JEXTEN_0)
188 #define ADC_EXTERNALTRIGINJECCONVEDGE_FALLING ((uint32_t)ADC_CR2_JEXTEN_1)
189 #define ADC_EXTERNALTRIGINJECCONVEDGE_RISINGFALLING ((uint32_t)ADC_CR2_JEXTEN)
190 
197 #define ADC_EXTERNALTRIGINJECCONV_T1_CC4 ((uint32_t)0x00000000U)
198 #define ADC_EXTERNALTRIGINJECCONV_T1_TRGO ((uint32_t)ADC_CR2_JEXTSEL_0)
199 #define ADC_EXTERNALTRIGINJECCONV_T2_CC1 ((uint32_t)ADC_CR2_JEXTSEL_1)
200 #define ADC_EXTERNALTRIGINJECCONV_T2_TRGO ((uint32_t)(ADC_CR2_JEXTSEL_1 | ADC_CR2_JEXTSEL_0))
201 #define ADC_EXTERNALTRIGINJECCONV_T3_CC2 ((uint32_t)ADC_CR2_JEXTSEL_2)
202 #define ADC_EXTERNALTRIGINJECCONV_T3_CC4 ((uint32_t)(ADC_CR2_JEXTSEL_2 | ADC_CR2_JEXTSEL_0))
203 #define ADC_EXTERNALTRIGINJECCONV_T4_CC1 ((uint32_t)(ADC_CR2_JEXTSEL_2 | ADC_CR2_JEXTSEL_1))
204 #define ADC_EXTERNALTRIGINJECCONV_T4_CC2 ((uint32_t)(ADC_CR2_JEXTSEL_2 | ADC_CR2_JEXTSEL_1 | ADC_CR2_JEXTSEL_0))
205 #define ADC_EXTERNALTRIGINJECCONV_T4_CC3 ((uint32_t)ADC_CR2_JEXTSEL_3)
206 #define ADC_EXTERNALTRIGINJECCONV_T4_TRGO ((uint32_t)(ADC_CR2_JEXTSEL_3 | ADC_CR2_JEXTSEL_0))
207 #define ADC_EXTERNALTRIGINJECCONV_T5_CC4 ((uint32_t)(ADC_CR2_JEXTSEL_3 | ADC_CR2_JEXTSEL_1))
208 #define ADC_EXTERNALTRIGINJECCONV_T5_TRGO ((uint32_t)(ADC_CR2_JEXTSEL_3 | ADC_CR2_JEXTSEL_1 | ADC_CR2_JEXTSEL_0))
209 #define ADC_EXTERNALTRIGINJECCONV_T8_CC2 ((uint32_t)(ADC_CR2_JEXTSEL_3 | ADC_CR2_JEXTSEL_2))
210 #define ADC_EXTERNALTRIGINJECCONV_T8_CC3 ((uint32_t)(ADC_CR2_JEXTSEL_3 | ADC_CR2_JEXTSEL_2 | ADC_CR2_JEXTSEL_0))
211 #define ADC_EXTERNALTRIGINJECCONV_T8_CC4 ((uint32_t)(ADC_CR2_JEXTSEL_3 | ADC_CR2_JEXTSEL_2 | ADC_CR2_JEXTSEL_1))
212 #define ADC_EXTERNALTRIGINJECCONV_EXT_IT15 ((uint32_t)ADC_CR2_JEXTSEL)
213 #define ADC_INJECTED_SOFTWARE_START ((uint32_t)ADC_CR2_JEXTSEL + 1U)
214 
221 #define ADC_INJECTED_RANK_1 ((uint32_t)0x00000001U)
222 #define ADC_INJECTED_RANK_2 ((uint32_t)0x00000002U)
223 #define ADC_INJECTED_RANK_3 ((uint32_t)0x00000003U)
224 #define ADC_INJECTED_RANK_4 ((uint32_t)0x00000004U)
225 
232 #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) || \
233  defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F410Tx) || defined(STM32F410Cx) || \
234  defined(STM32F410Rx) || defined(STM32F412Zx) || defined(STM32F412Vx) || defined(STM32F412Rx) || \
235  defined(STM32F412Cx)
236 #define ADC_CHANNEL_TEMPSENSOR ((uint32_t)ADC_CHANNEL_16)
237 #endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx || STM32F401xC || STM32F401xE || STM32F410xx || STM32F412Zx || STM32F412Vx || STM32F412Rx || STM32F412Cxs */
238 
239 #if defined(STM32F411xE) || defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) || \
240  defined(STM32F446xx) || defined(STM32F469xx) || defined(STM32F479xx)
241 #define ADC_CHANNEL_DIFFERENCIATION_TEMPSENSOR_VBAT ((uint32_t)0x10000000U) /* Dummy bit for driver internal usage, not used in ADC channel setting registers CR1 or SQRx */
242 #define ADC_CHANNEL_TEMPSENSOR ((uint32_t)ADC_CHANNEL_18 | ADC_CHANNEL_DIFFERENCIATION_TEMPSENSOR_VBAT)
243 #endif /* STM32F411xE || STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F446xx || STM32F469xx || STM32F479xx */
244 
253 /* Exported macro ------------------------------------------------------------*/
257 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx)|| defined(STM32F439xx)
258 
269 #define __HAL_ADC_PATH_INTERNAL_VBAT_DISABLE() (ADC->CCR &= ~(ADC_CCR_VBATE))
270 #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx */
271 
275 /* Exported functions --------------------------------------------------------*/
284 /* I/O operation functions ******************************************************/
285 HAL_StatusTypeDef HAL_ADCEx_InjectedStart(ADC_HandleTypeDef* hadc);
286 HAL_StatusTypeDef HAL_ADCEx_InjectedStop(ADC_HandleTypeDef* hadc);
287 HAL_StatusTypeDef HAL_ADCEx_InjectedPollForConversion(ADC_HandleTypeDef* hadc, uint32_t Timeout);
288 HAL_StatusTypeDef HAL_ADCEx_InjectedStart_IT(ADC_HandleTypeDef* hadc);
289 HAL_StatusTypeDef HAL_ADCEx_InjectedStop_IT(ADC_HandleTypeDef* hadc);
290 uint32_t HAL_ADCEx_InjectedGetValue(ADC_HandleTypeDef* hadc, uint32_t InjectedRank);
291 HAL_StatusTypeDef HAL_ADCEx_MultiModeStart_DMA(ADC_HandleTypeDef* hadc, uint32_t* pData, uint32_t Length);
292 HAL_StatusTypeDef HAL_ADCEx_MultiModeStop_DMA(ADC_HandleTypeDef* hadc);
293 uint32_t HAL_ADCEx_MultiModeGetValue(ADC_HandleTypeDef* hadc);
294 void HAL_ADCEx_InjectedConvCpltCallback(ADC_HandleTypeDef* hadc);
295 
296 /* Peripheral Control functions *************************************************/
297 HAL_StatusTypeDef HAL_ADCEx_InjectedConfigChannel(ADC_HandleTypeDef* hadc,ADC_InjectionConfTypeDef* sConfigInjected);
298 HAL_StatusTypeDef HAL_ADCEx_MultiModeConfigChannel(ADC_HandleTypeDef* hadc, ADC_MultiModeTypeDef* multimode);
299 
307 /* Private types -------------------------------------------------------------*/
308 /* Private variables ---------------------------------------------------------*/
309 /* Private constants ---------------------------------------------------------*/
318 /* Private macros ------------------------------------------------------------*/
322 #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) || \
323  defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F410Tx) || defined(STM32F410Cx) || \
324  defined(STM32F410Rx) || defined(STM32F411xE) || defined(STM32F412Zx) || defined(STM32F412Vx) || \
325  defined(STM32F412Rx) || defined(STM32F412Cx)
326 #define IS_ADC_CHANNEL(CHANNEL) ((CHANNEL) <= ADC_CHANNEL_18)
327 #endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx || STM32F401xC || STM32F401xE || STM32F410xx || STM32F411xE || STM32F412Zx || STM32F412Vx || STM32F412Rx || STM32F412Cx */
328 
329 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) || \
330  defined(STM32F446xx) || defined(STM32F469xx) || defined(STM32F479xx)
331 #define IS_ADC_CHANNEL(CHANNEL) (((CHANNEL) <= ADC_CHANNEL_18) || \
332  ((CHANNEL) == ADC_CHANNEL_TEMPSENSOR))
333 #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F446xx || STM32F469xx || STM32F479xx */
334 
335 #define IS_ADC_MODE(MODE) (((MODE) == ADC_MODE_INDEPENDENT) || \
336  ((MODE) == ADC_DUALMODE_REGSIMULT_INJECSIMULT) || \
337  ((MODE) == ADC_DUALMODE_REGSIMULT_ALTERTRIG) || \
338  ((MODE) == ADC_DUALMODE_INJECSIMULT) || \
339  ((MODE) == ADC_DUALMODE_REGSIMULT) || \
340  ((MODE) == ADC_DUALMODE_INTERL) || \
341  ((MODE) == ADC_DUALMODE_ALTERTRIG) || \
342  ((MODE) == ADC_TRIPLEMODE_REGSIMULT_INJECSIMULT) || \
343  ((MODE) == ADC_TRIPLEMODE_REGSIMULT_AlterTrig) || \
344  ((MODE) == ADC_TRIPLEMODE_INJECSIMULT) || \
345  ((MODE) == ADC_TRIPLEMODE_REGSIMULT) || \
346  ((MODE) == ADC_TRIPLEMODE_INTERL) || \
347  ((MODE) == ADC_TRIPLEMODE_ALTERTRIG))
348 #define IS_ADC_DMA_ACCESS_MODE(MODE) (((MODE) == ADC_DMAACCESSMODE_DISABLED) || \
349  ((MODE) == ADC_DMAACCESSMODE_1) || \
350  ((MODE) == ADC_DMAACCESSMODE_2) || \
351  ((MODE) == ADC_DMAACCESSMODE_3))
352 #define IS_ADC_EXT_INJEC_TRIG_EDGE(EDGE) (((EDGE) == ADC_EXTERNALTRIGINJECCONVEDGE_NONE) || \
353  ((EDGE) == ADC_EXTERNALTRIGINJECCONVEDGE_RISING) || \
354  ((EDGE) == ADC_EXTERNALTRIGINJECCONVEDGE_FALLING) || \
355  ((EDGE) == ADC_EXTERNALTRIGINJECCONVEDGE_RISINGFALLING))
356 #define IS_ADC_EXT_INJEC_TRIG(INJTRIG) (((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T1_CC4) || \
357  ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T1_TRGO) || \
358  ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T2_CC1) || \
359  ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T2_TRGO) || \
360  ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T3_CC2) || \
361  ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T3_CC4) || \
362  ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T4_CC1) || \
363  ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T4_CC2) || \
364  ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T4_CC3) || \
365  ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T4_TRGO) || \
366  ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T5_CC4) || \
367  ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T5_TRGO) || \
368  ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T8_CC2) || \
369  ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T8_CC3) || \
370  ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T8_CC4) || \
371  ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_EXT_IT15)|| \
372  ((INJTRIG) == ADC_INJECTED_SOFTWARE_START))
373 #define IS_ADC_INJECTED_LENGTH(LENGTH) (((LENGTH) >= ((uint32_t)1U)) && ((LENGTH) <= ((uint32_t)4U)))
374 #define IS_ADC_INJECTED_RANK(RANK) (((RANK) >= ((uint32_t)1U)) && ((RANK) <= ((uint32_t)4U)))
375 
383 #define ADC_JSQR(_CHANNELNB_, _RANKNB_, _JSQR_JL_) (((uint32_t)((uint16_t)(_CHANNELNB_))) << (5U * (uint8_t)(((_RANKNB_) + 3U) - (_JSQR_JL_))))
384 
389 /* Private functions ---------------------------------------------------------*/
406 #ifdef __cplusplus
407 }
408 #endif
409 
410 #endif /*__STM32F4xx_ADC_EX_H */
411 
412 
413 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
uint32_t InjectedSamplingTime
Definition: stm32f4xx_hal_adc_ex.h:82
This file contains HAL common defines, enumeration, macros and structures definitions.
uint32_t ExternalTrigInjecConvEdge
Definition: stm32f4xx_hal_adc_ex.h:123
uint32_t Mode
Definition: stm32f4xx_hal_adc_ex.h:135
uint32_t TwoSamplingDelay
Definition: stm32f4xx_hal_adc_ex.h:139
HAL_StatusTypeDef
HAL Status structures definition.
Definition: stm32f4xx_hal_def.h:57
uint32_t InjectedDiscontinuousConvMode
Definition: stm32f4xx_hal_adc_ex.h:100
uint32_t InjectedRank
Definition: stm32f4xx_hal_adc_ex.h:79
uint32_t InjectedNbrOfConversion
Definition: stm32f4xx_hal_adc_ex.h:95
uint32_t InjectedOffset
Definition: stm32f4xx_hal_adc_ex.h:91
ADC Configuration multi-mode structure definition.
Definition: stm32f4xx_hal_adc_ex.h:133
uint32_t DMAAccessMode
Definition: stm32f4xx_hal_adc_ex.h:137
uint32_t InjectedChannel
Definition: stm32f4xx_hal_adc_ex.h:76
ADC handle Structure definition.
Definition: stm32f4xx_hal_adc.h:210
uint32_t ExternalTrigInjecConv
Definition: stm32f4xx_hal_adc_ex.h:115
ADC Configuration injected Channel structure definition.
Definition: stm32f4xx_hal_adc_ex.h:74
uint32_t AutoInjectedConv
Definition: stm32f4xx_hal_adc_ex.h:107