39 #ifndef __STM32F4xx_HAL_CAN_H 40 #define __STM32F4xx_HAL_CAN_H 46 #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) ||\ 47 defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) ||\ 48 defined(STM32F446xx) || defined(STM32F469xx) || defined(STM32F479xx) || defined(STM32F412Zx) ||\ 49 defined(STM32F412Vx) || defined(STM32F412Rx) || defined(STM32F412Cx) 71 HAL_CAN_STATE_RESET = 0x00U,
72 HAL_CAN_STATE_READY = 0x01U,
73 HAL_CAN_STATE_BUSY = 0x02U,
74 HAL_CAN_STATE_BUSY_TX = 0x12U,
75 HAL_CAN_STATE_BUSY_RX = 0x22U,
76 HAL_CAN_STATE_BUSY_TX_RX = 0x32U,
77 HAL_CAN_STATE_TIMEOUT = 0x03U,
78 HAL_CAN_STATE_ERROR = 0x04U
80 }HAL_CAN_StateTypeDef;
128 uint32_t FilterIdHigh;
132 uint32_t FilterIdLow;
136 uint32_t FilterMaskIdHigh;
141 uint32_t FilterMaskIdLow;
146 uint32_t FilterFIFOAssignment;
149 uint32_t FilterNumber;
155 uint32_t FilterScale;
158 uint32_t FilterActivation;
164 }CAN_FilterConfTypeDef;
229 CAN_InitTypeDef Init;
231 CanTxMsgTypeDef* pTxMsg;
233 CanRxMsgTypeDef* pRxMsg;
235 __IO HAL_CAN_StateTypeDef State;
239 __IO uint32_t ErrorCode;
255 #define HAL_CAN_ERROR_NONE 0x00U 256 #define HAL_CAN_ERROR_EWG 0x01U 257 #define HAL_CAN_ERROR_EPV 0x02U 258 #define HAL_CAN_ERROR_BOF 0x04U 259 #define HAL_CAN_ERROR_STF 0x08U 260 #define HAL_CAN_ERROR_FOR 0x10U 261 #define HAL_CAN_ERROR_ACK 0x20U 262 #define HAL_CAN_ERROR_BR 0x40U 263 #define HAL_CAN_ERROR_BD 0x80U 264 #define HAL_CAN_ERROR_CRC 0x100U 272 #define CAN_INITSTATUS_FAILED ((uint8_t)0x00U) 273 #define CAN_INITSTATUS_SUCCESS ((uint8_t)0x01U) 281 #define CAN_MODE_NORMAL ((uint32_t)0x00000000U) 282 #define CAN_MODE_LOOPBACK ((uint32_t)CAN_BTR_LBKM) 283 #define CAN_MODE_SILENT ((uint32_t)CAN_BTR_SILM) 284 #define CAN_MODE_SILENT_LOOPBACK ((uint32_t)(CAN_BTR_LBKM | CAN_BTR_SILM)) 292 #define CAN_SJW_1TQ ((uint32_t)0x00000000U) 293 #define CAN_SJW_2TQ ((uint32_t)CAN_BTR_SJW_0) 294 #define CAN_SJW_3TQ ((uint32_t)CAN_BTR_SJW_1) 295 #define CAN_SJW_4TQ ((uint32_t)CAN_BTR_SJW) 303 #define CAN_BS1_1TQ ((uint32_t)0x00000000U) 304 #define CAN_BS1_2TQ ((uint32_t)CAN_BTR_TS1_0) 305 #define CAN_BS1_3TQ ((uint32_t)CAN_BTR_TS1_1) 306 #define CAN_BS1_4TQ ((uint32_t)(CAN_BTR_TS1_1 | CAN_BTR_TS1_0)) 307 #define CAN_BS1_5TQ ((uint32_t)CAN_BTR_TS1_2) 308 #define CAN_BS1_6TQ ((uint32_t)(CAN_BTR_TS1_2 | CAN_BTR_TS1_0)) 309 #define CAN_BS1_7TQ ((uint32_t)(CAN_BTR_TS1_2 | CAN_BTR_TS1_1)) 310 #define CAN_BS1_8TQ ((uint32_t)(CAN_BTR_TS1_2 | CAN_BTR_TS1_1 | CAN_BTR_TS1_0)) 311 #define CAN_BS1_9TQ ((uint32_t)CAN_BTR_TS1_3) 312 #define CAN_BS1_10TQ ((uint32_t)(CAN_BTR_TS1_3 | CAN_BTR_TS1_0)) 313 #define CAN_BS1_11TQ ((uint32_t)(CAN_BTR_TS1_3 | CAN_BTR_TS1_1)) 314 #define CAN_BS1_12TQ ((uint32_t)(CAN_BTR_TS1_3 | CAN_BTR_TS1_1 | CAN_BTR_TS1_0)) 315 #define CAN_BS1_13TQ ((uint32_t)(CAN_BTR_TS1_3 | CAN_BTR_TS1_2)) 316 #define CAN_BS1_14TQ ((uint32_t)(CAN_BTR_TS1_3 | CAN_BTR_TS1_2 | CAN_BTR_TS1_0)) 317 #define CAN_BS1_15TQ ((uint32_t)(CAN_BTR_TS1_3 | CAN_BTR_TS1_2 | CAN_BTR_TS1_1)) 318 #define CAN_BS1_16TQ ((uint32_t)CAN_BTR_TS1) 326 #define CAN_BS2_1TQ ((uint32_t)0x00000000U) 327 #define CAN_BS2_2TQ ((uint32_t)CAN_BTR_TS2_0) 328 #define CAN_BS2_3TQ ((uint32_t)CAN_BTR_TS2_1) 329 #define CAN_BS2_4TQ ((uint32_t)(CAN_BTR_TS2_1 | CAN_BTR_TS2_0)) 330 #define CAN_BS2_5TQ ((uint32_t)CAN_BTR_TS2_2) 331 #define CAN_BS2_6TQ ((uint32_t)(CAN_BTR_TS2_2 | CAN_BTR_TS2_0)) 332 #define CAN_BS2_7TQ ((uint32_t)(CAN_BTR_TS2_2 | CAN_BTR_TS2_1)) 333 #define CAN_BS2_8TQ ((uint32_t)CAN_BTR_TS2) 341 #define CAN_FILTERMODE_IDMASK ((uint8_t)0x00U) 342 #define CAN_FILTERMODE_IDLIST ((uint8_t)0x01U) 350 #define CAN_FILTERSCALE_16BIT ((uint8_t)0x00U) 351 #define CAN_FILTERSCALE_32BIT ((uint8_t)0x01U) 359 #define CAN_FILTER_FIFO0 ((uint8_t)0x00U) 360 #define CAN_FILTER_FIFO1 ((uint8_t)0x01U) 368 #define CAN_ID_STD ((uint32_t)0x00000000U) 369 #define CAN_ID_EXT ((uint32_t)0x00000004U) 377 #define CAN_RTR_DATA ((uint32_t)0x00000000U) 378 #define CAN_RTR_REMOTE ((uint32_t)0x00000002U) 386 #define CAN_FIFO0 ((uint8_t)0x00U) 387 #define CAN_FIFO1 ((uint8_t)0x01U) 401 #define CAN_FLAG_RQCP0 ((uint32_t)0x00000500U) 402 #define CAN_FLAG_RQCP1 ((uint32_t)0x00000508U) 403 #define CAN_FLAG_RQCP2 ((uint32_t)0x00000510U) 404 #define CAN_FLAG_TXOK0 ((uint32_t)0x00000501U) 405 #define CAN_FLAG_TXOK1 ((uint32_t)0x00000509U) 406 #define CAN_FLAG_TXOK2 ((uint32_t)0x00000511U) 407 #define CAN_FLAG_TME0 ((uint32_t)0x0000051AU) 408 #define CAN_FLAG_TME1 ((uint32_t)0x0000051BU) 409 #define CAN_FLAG_TME2 ((uint32_t)0x0000051CU) 412 #define CAN_FLAG_FF0 ((uint32_t)0x00000203U) 413 #define CAN_FLAG_FOV0 ((uint32_t)0x00000204U) 415 #define CAN_FLAG_FF1 ((uint32_t)0x00000403U) 416 #define CAN_FLAG_FOV1 ((uint32_t)0x00000404U) 419 #define CAN_FLAG_INAK ((uint32_t)0x00000100U) 420 #define CAN_FLAG_SLAK ((uint32_t)0x00000101U) 421 #define CAN_FLAG_ERRI ((uint32_t)0x00000102U) 422 #define CAN_FLAG_WKU ((uint32_t)0x00000103U) 423 #define CAN_FLAG_SLAKI ((uint32_t)0x00000104U) 429 #define CAN_FLAG_EWG ((uint32_t)0x00000300U) 430 #define CAN_FLAG_EPV ((uint32_t)0x00000301U) 431 #define CAN_FLAG_BOF ((uint32_t)0x00000302U) 439 #define CAN_IT_TME ((uint32_t)CAN_IER_TMEIE) 442 #define CAN_IT_FMP0 ((uint32_t)CAN_IER_FMPIE0) 443 #define CAN_IT_FF0 ((uint32_t)CAN_IER_FFIE0) 444 #define CAN_IT_FOV0 ((uint32_t)CAN_IER_FOVIE0) 445 #define CAN_IT_FMP1 ((uint32_t)CAN_IER_FMPIE1) 446 #define CAN_IT_FF1 ((uint32_t)CAN_IER_FFIE1) 447 #define CAN_IT_FOV1 ((uint32_t)CAN_IER_FOVIE1) 450 #define CAN_IT_WKU ((uint32_t)CAN_IER_WKUIE) 451 #define CAN_IT_SLK ((uint32_t)CAN_IER_SLKIE) 454 #define CAN_IT_EWG ((uint32_t)CAN_IER_EWGIE) 455 #define CAN_IT_EPV ((uint32_t)CAN_IER_EPVIE) 456 #define CAN_IT_BOF ((uint32_t)CAN_IER_BOFIE) 457 #define CAN_IT_LEC ((uint32_t)CAN_IER_LECIE) 458 #define CAN_IT_ERR ((uint32_t)CAN_IER_ERRIE) 466 #define CAN_TXMAILBOX_0 ((uint8_t)0x00U) 467 #define CAN_TXMAILBOX_1 ((uint8_t)0x01U) 468 #define CAN_TXMAILBOX_2 ((uint8_t)0x02U) 486 #define __HAL_CAN_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_CAN_STATE_RESET) 494 #define __HAL_CAN_ENABLE_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->IER) |= (__INTERRUPT__)) 502 #define __HAL_CAN_DISABLE_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->IER) &= ~(__INTERRUPT__)) 510 #define __HAL_CAN_MSG_PENDING(__HANDLE__, __FIFONUMBER__) (((__FIFONUMBER__) == CAN_FIFO0)? \ 511 ((uint8_t)((__HANDLE__)->Instance->RF0R&(uint32_t)0x03U)) : ((uint8_t)((__HANDLE__)->Instance->RF1R & (uint32_t)0x03U))) 540 #define __HAL_CAN_GET_FLAG(__HANDLE__, __FLAG__) \ 541 ((((__FLAG__) >> 8U) == 5U)? ((((__HANDLE__)->Instance->TSR) & (1U << ((__FLAG__) & CAN_FLAG_MASK))) == (1U << ((__FLAG__) & CAN_FLAG_MASK))): \ 542 (((__FLAG__) >> 8U) == 2U)? ((((__HANDLE__)->Instance->RF0R) & (1U << ((__FLAG__) & CAN_FLAG_MASK))) == (1U << ((__FLAG__) & CAN_FLAG_MASK))): \ 543 (((__FLAG__) >> 8U) == 4U)? ((((__HANDLE__)->Instance->RF1R) & (1U << ((__FLAG__) & CAN_FLAG_MASK))) == (1U << ((__FLAG__) & CAN_FLAG_MASK))): \ 544 (((__FLAG__) >> 8U) == 1U)? ((((__HANDLE__)->Instance->MSR) & (1U << ((__FLAG__) & CAN_FLAG_MASK))) == (1U << ((__FLAG__) & CAN_FLAG_MASK))): \ 545 ((((__HANDLE__)->Instance->ESR) & (1U << ((__FLAG__) & CAN_FLAG_MASK))) == (1U << ((__FLAG__) & CAN_FLAG_MASK)))) 571 #define __HAL_CAN_CLEAR_FLAG(__HANDLE__, __FLAG__) \ 572 ((((__FLAG__) >> 8U) == 5U)? (((__HANDLE__)->Instance->TSR) = ((uint32_t)1U << ((__FLAG__) & CAN_FLAG_MASK))): \ 573 (((__FLAG__) >> 8U) == 2U)? (((__HANDLE__)->Instance->RF0R) = ((uint32_t)1U << ((__FLAG__) & CAN_FLAG_MASK))): \ 574 (((__FLAG__) >> 8U) == 4U)? (((__HANDLE__)->Instance->RF1R) = ((uint32_t)1U << ((__FLAG__) & CAN_FLAG_MASK))): \ 575 (((__HANDLE__)->Instance->MSR) = ((uint32_t)1U << ((__FLAG__) & CAN_FLAG_MASK)))) 586 #define __HAL_CAN_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->IER & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET) 594 #define __HAL_CAN_TRANSMIT_STATUS(__HANDLE__, __TRANSMITMAILBOX__)\ 595 (((__TRANSMITMAILBOX__) == CAN_TXMAILBOX_0)? ((((__HANDLE__)->Instance->TSR) & (CAN_TSR_RQCP0 | CAN_TSR_TXOK0 | CAN_TSR_TME0)) == (CAN_TSR_RQCP0 | CAN_TSR_TXOK0 | CAN_TSR_TME0)) :\ 596 ((__TRANSMITMAILBOX__) == CAN_TXMAILBOX_1)? ((((__HANDLE__)->Instance->TSR) & (CAN_TSR_RQCP1 | CAN_TSR_TXOK1 | CAN_TSR_TME1)) == (CAN_TSR_RQCP1 | CAN_TSR_TXOK1 | CAN_TSR_TME1)) :\ 597 ((((__HANDLE__)->Instance->TSR) & (CAN_TSR_RQCP2 | CAN_TSR_TXOK2 | CAN_TSR_TME2)) == (CAN_TSR_RQCP2 | CAN_TSR_TXOK2 | CAN_TSR_TME2))) 605 #define __HAL_CAN_FIFO_RELEASE(__HANDLE__, __FIFONUMBER__) (((__FIFONUMBER__) == CAN_FIFO0)? \ 606 ((__HANDLE__)->Instance->RF0R = CAN_RF0R_RFOM0) : ((__HANDLE__)->Instance->RF1R = CAN_RF1R_RFOM1)) 614 #define __HAL_CAN_CANCEL_TRANSMIT(__HANDLE__, __TRANSMITMAILBOX__)\ 615 (((__TRANSMITMAILBOX__) == CAN_TXMAILBOX_0)? ((__HANDLE__)->Instance->TSR = CAN_TSR_ABRQ0) :\ 616 ((__TRANSMITMAILBOX__) == CAN_TXMAILBOX_1)? ((__HANDLE__)->Instance->TSR = CAN_TSR_ABRQ1) :\ 617 ((__HANDLE__)->Instance->TSR = CAN_TSR_ABRQ2)) 628 #define __HAL_CAN_DBG_FREEZE(__HANDLE__, __NEWSTATE__) (((__NEWSTATE__) == ENABLE)? \ 629 ((__HANDLE__)->Instance->MCR |= CAN_MCR_DBF) : ((__HANDLE__)->Instance->MCR &= ~CAN_MCR_DBF)) 645 HAL_StatusTypeDef HAL_CAN_ConfigFilter(CAN_HandleTypeDef* hcan, CAN_FilterConfTypeDef* sFilterConfig);
647 void HAL_CAN_MspInit(CAN_HandleTypeDef* hcan);
648 void HAL_CAN_MspDeInit(CAN_HandleTypeDef* hcan);
659 HAL_StatusTypeDef HAL_CAN_Receive(CAN_HandleTypeDef *hcan, uint8_t FIFONumber, uint32_t Timeout);
660 HAL_StatusTypeDef HAL_CAN_Receive_IT(CAN_HandleTypeDef *hcan, uint8_t FIFONumber);
663 void HAL_CAN_IRQHandler(CAN_HandleTypeDef* hcan);
664 void HAL_CAN_TxCpltCallback(CAN_HandleTypeDef* hcan);
665 void HAL_CAN_RxCpltCallback(CAN_HandleTypeDef* hcan);
666 void HAL_CAN_ErrorCallback(CAN_HandleTypeDef *hcan);
675 uint32_t HAL_CAN_GetError(CAN_HandleTypeDef *hcan);
676 HAL_CAN_StateTypeDef HAL_CAN_GetState(CAN_HandleTypeDef* hcan);
707 #define CAN_TXSTATUS_NOMAILBOX ((uint8_t)0x04U) 708 #define CAN_FLAG_MASK ((uint32_t)0x000000FFU) 717 #define IS_CAN_MODE(MODE) (((MODE) == CAN_MODE_NORMAL) || \ 718 ((MODE) == CAN_MODE_LOOPBACK)|| \ 719 ((MODE) == CAN_MODE_SILENT) || \ 720 ((MODE) == CAN_MODE_SILENT_LOOPBACK)) 721 #define IS_CAN_SJW(SJW) (((SJW) == CAN_SJW_1TQ) || ((SJW) == CAN_SJW_2TQ)|| \ 722 ((SJW) == CAN_SJW_3TQ) || ((SJW) == CAN_SJW_4TQ)) 723 #define IS_CAN_BS1(BS1) ((BS1) <= CAN_BS1_16TQ) 724 #define IS_CAN_BS2(BS2) ((BS2) <= CAN_BS2_8TQ) 725 #define IS_CAN_PRESCALER(PRESCALER) (((PRESCALER) >= 1U) && ((PRESCALER) <= 1024U)) 726 #define IS_CAN_FILTER_NUMBER(NUMBER) ((NUMBER) <= 27U) 727 #define IS_CAN_FILTER_MODE(MODE) (((MODE) == CAN_FILTERMODE_IDMASK) || \ 728 ((MODE) == CAN_FILTERMODE_IDLIST)) 729 #define IS_CAN_FILTER_SCALE(SCALE) (((SCALE) == CAN_FILTERSCALE_16BIT) || \ 730 ((SCALE) == CAN_FILTERSCALE_32BIT)) 731 #define IS_CAN_FILTER_FIFO(FIFO) (((FIFO) == CAN_FILTER_FIFO0) || \ 732 ((FIFO) == CAN_FILTER_FIFO1)) 733 #define IS_CAN_BANKNUMBER(BANKNUMBER) ((BANKNUMBER) <= 28U) 735 #define IS_CAN_TRANSMITMAILBOX(TRANSMITMAILBOX) ((TRANSMITMAILBOX) <= ((uint8_t)0x02U)) 736 #define IS_CAN_STDID(STDID) ((STDID) <= ((uint32_t)0x7FFU)) 737 #define IS_CAN_EXTID(EXTID) ((EXTID) <= ((uint32_t)0x1FFFFFFFU)) 738 #define IS_CAN_DLC(DLC) ((DLC) <= ((uint8_t)0x08U)) 740 #define IS_CAN_IDTYPE(IDTYPE) (((IDTYPE) == CAN_ID_STD) || \ 741 ((IDTYPE) == CAN_ID_EXT)) 742 #define IS_CAN_RTR(RTR) (((RTR) == CAN_RTR_DATA) || ((RTR) == CAN_RTR_REMOTE)) 743 #define IS_CAN_FIFO(FIFO) (((FIFO) == CAN_FIFO0) || ((FIFO) == CAN_FIFO1)) This file contains HAL common defines, enumeration, macros and structures definitions.
HAL_StatusTypeDef
HAL Status structures definition.
Definition: stm32f4xx_hal_def.h:57
Controller Area Network.
Definition: stm32f405xx.h:264
#define __IO
Definition: core_cm0.h:213
HAL_LockTypeDef
HAL Lock structures definition.
Definition: stm32f4xx_hal_def.h:68