39 #ifndef __STM32F4xx_HAL_DAC_H 40 #define __STM32F4xx_HAL_DAC_H 46 #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) ||\ 47 defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) ||\ 48 defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx) || defined(STM32F446xx) ||\ 49 defined(STM32F469xx) || defined(STM32F479xx) 72 HAL_DAC_STATE_RESET = 0x00U,
73 HAL_DAC_STATE_READY = 0x01U,
74 HAL_DAC_STATE_BUSY = 0x02U,
75 HAL_DAC_STATE_TIMEOUT = 0x03U,
76 HAL_DAC_STATE_ERROR = 0x04U
77 }HAL_DAC_StateTypeDef;
86 __IO HAL_DAC_StateTypeDef State;
94 __IO uint32_t ErrorCode;
103 uint32_t DAC_Trigger;
106 uint32_t DAC_OutputBuffer;
108 }DAC_ChannelConfTypeDef;
121 #define HAL_DAC_ERROR_NONE 0x00U 122 #define HAL_DAC_ERROR_DMAUNDERRUNCH1 0x01U 123 #define HAL_DAC_ERROR_DMAUNDERRUNCH2 0x02U 124 #define HAL_DAC_ERROR_DMA 0x04U 133 #define DAC_TRIGGER_NONE ((uint32_t)0x00000000U) 135 #define DAC_TRIGGER_T2_TRGO ((uint32_t)(DAC_CR_TSEL1_2 | DAC_CR_TEN1)) 136 #define DAC_TRIGGER_T4_TRGO ((uint32_t)(DAC_CR_TSEL1_2 | DAC_CR_TSEL1_0 | DAC_CR_TEN1)) 137 #define DAC_TRIGGER_T5_TRGO ((uint32_t)(DAC_CR_TSEL1_1 | DAC_CR_TSEL1_0 | DAC_CR_TEN1)) 138 #define DAC_TRIGGER_T6_TRGO ((uint32_t)DAC_CR_TEN1) 139 #define DAC_TRIGGER_T7_TRGO ((uint32_t)(DAC_CR_TSEL1_1 | DAC_CR_TEN1)) 140 #define DAC_TRIGGER_T8_TRGO ((uint32_t)(DAC_CR_TSEL1_0 | DAC_CR_TEN1)) 142 #define DAC_TRIGGER_EXT_IT9 ((uint32_t)(DAC_CR_TSEL1_2 | DAC_CR_TSEL1_1 | DAC_CR_TEN1)) 143 #define DAC_TRIGGER_SOFTWARE ((uint32_t)(DAC_CR_TSEL1 | DAC_CR_TEN1)) 151 #define DAC_OUTPUTBUFFER_ENABLE ((uint32_t)0x00000000U) 152 #define DAC_OUTPUTBUFFER_DISABLE ((uint32_t)DAC_CR_BOFF1) 160 #define DAC_CHANNEL_1 ((uint32_t)0x00000000U) 161 #define DAC_CHANNEL_2 ((uint32_t)0x00000010U) 169 #define DAC_ALIGN_12B_R ((uint32_t)0x00000000U) 170 #define DAC_ALIGN_12B_L ((uint32_t)0x00000004U) 171 #define DAC_ALIGN_8B_R ((uint32_t)0x00000008U) 179 #define DAC_FLAG_DMAUDR1 ((uint32_t)DAC_SR_DMAUDR1) 180 #define DAC_FLAG_DMAUDR2 ((uint32_t)DAC_SR_DMAUDR2) 188 #define DAC_IT_DMAUDR1 ((uint32_t)DAC_SR_DMAUDR1) 189 #define DAC_IT_DMAUDR2 ((uint32_t)DAC_SR_DMAUDR2) 207 #define __HAL_DAC_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_DAC_STATE_RESET) 214 #define __HAL_DAC_ENABLE(__HANDLE__, __DAC_Channel__) ((__HANDLE__)->Instance->CR |= (DAC_CR_EN1 << (__DAC_Channel__))) 221 #define __HAL_DAC_DISABLE(__HANDLE__, __DAC_Channel__) ((__HANDLE__)->Instance->CR &= ~(DAC_CR_EN1 << (__DAC_Channel__))) 228 #define __HAL_DAC_ENABLE_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->CR) |= (__INTERRUPT__)) 235 #define __HAL_DAC_DISABLE_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->CR) &= ~(__INTERRUPT__)) 245 #define __HAL_DAC_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->CR & (__INTERRUPT__)) == (__INTERRUPT__)) 255 #define __HAL_DAC_GET_FLAG(__HANDLE__, __FLAG__) ((((__HANDLE__)->Instance->SR) & (__FLAG__)) == (__FLAG__)) 265 #define __HAL_DAC_CLEAR_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->SR) = (__FLAG__)) 271 #include "stm32f4xx_hal_dac_ex.h" 284 void HAL_DAC_MspInit(DAC_HandleTypeDef* hdac);
285 void HAL_DAC_MspDeInit(DAC_HandleTypeDef* hdac);
296 HAL_StatusTypeDef HAL_DAC_Start_DMA(DAC_HandleTypeDef* hdac, uint32_t Channel, uint32_t* pData, uint32_t Length, uint32_t Alignment);
298 uint32_t HAL_DAC_GetValue(DAC_HandleTypeDef* hdac, uint32_t Channel);
307 HAL_StatusTypeDef HAL_DAC_ConfigChannel(DAC_HandleTypeDef* hdac, DAC_ChannelConfTypeDef* sConfig, uint32_t Channel);
308 HAL_StatusTypeDef HAL_DAC_SetValue(DAC_HandleTypeDef* hdac, uint32_t Channel, uint32_t Alignment, uint32_t Data);
317 HAL_DAC_StateTypeDef HAL_DAC_GetState(DAC_HandleTypeDef* hdac);
318 void HAL_DAC_IRQHandler(DAC_HandleTypeDef* hdac);
319 uint32_t HAL_DAC_GetError(DAC_HandleTypeDef *hdac);
321 void HAL_DAC_ConvCpltCallbackCh1(DAC_HandleTypeDef* hdac);
322 void HAL_DAC_ConvHalfCpltCallbackCh1(DAC_HandleTypeDef* hdac);
323 void HAL_DAC_ErrorCallbackCh1(DAC_HandleTypeDef *hdac);
324 void HAL_DAC_DMAUnderrunCallbackCh1(DAC_HandleTypeDef *hdac);
347 #define IS_DAC_DATA(DATA) ((DATA) <= 0xFFF0U) 348 #define IS_DAC_ALIGN(ALIGN) (((ALIGN) == DAC_ALIGN_12B_R) || \ 349 ((ALIGN) == DAC_ALIGN_12B_L) || \ 350 ((ALIGN) == DAC_ALIGN_8B_R)) 351 #define IS_DAC_CHANNEL(CHANNEL) (((CHANNEL) == DAC_CHANNEL_1) || \ 352 ((CHANNEL) == DAC_CHANNEL_2)) 353 #define IS_DAC_OUTPUT_BUFFER_STATE(STATE) (((STATE) == DAC_OUTPUTBUFFER_ENABLE) || \ 354 ((STATE) == DAC_OUTPUTBUFFER_DISABLE)) 356 #define IS_DAC_TRIGGER(TRIGGER) (((TRIGGER) == DAC_TRIGGER_NONE) || \ 357 ((TRIGGER) == DAC_TRIGGER_T2_TRGO) || \ 358 ((TRIGGER) == DAC_TRIGGER_T8_TRGO) || \ 359 ((TRIGGER) == DAC_TRIGGER_T7_TRGO) || \ 360 ((TRIGGER) == DAC_TRIGGER_T5_TRGO) || \ 361 ((TRIGGER) == DAC_TRIGGER_T6_TRGO) || \ 362 ((TRIGGER) == DAC_TRIGGER_T4_TRGO) || \ 363 ((TRIGGER) == DAC_TRIGGER_EXT_IT9) || \ 364 ((TRIGGER) == DAC_TRIGGER_SOFTWARE)) 370 #define DAC_DHR12R1_ALIGNMENT(__ALIGNMENT__) (((uint32_t)0x00000008U) + (__ALIGNMENT__)) 376 #define DAC_DHR12R2_ALIGNMENT(__ALIGNMENT__) (((uint32_t)0x00000014U) + (__ALIGNMENT__)) 382 #define DAC_DHR12RD_ALIGNMENT(__ALIGNMENT__) (((uint32_t)0x00000020U) + (__ALIGNMENT__)) This file contains HAL common defines, enumeration, macros and structures definitions.
HAL_StatusTypeDef
HAL Status structures definition.
Definition: stm32f4xx_hal_def.h:57
#define __IO
Definition: core_cm0.h:213
Digital to Analog Converter.
Definition: stm32f405xx.h:307
HAL_LockTypeDef
HAL Lock structures definition.
Definition: stm32f4xx_hal_def.h:68
DMA handle Structure definition.
Definition: stm32f4xx_hal_dma.h:157