STM CMSIS
stm32f4xx_hal_fmpi2c.h
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1 
38 /* Define to prevent recursive inclusion -------------------------------------*/
39 #ifndef __STM32F4xx_HAL_FMPI2C_H
40 #define __STM32F4xx_HAL_FMPI2C_H
41 
42 #ifdef __cplusplus
43  extern "C" {
44 #endif
45 
46 #if defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx) || defined(STM32F446xx) || defined(STM32F412Zx) ||\
47  defined(STM32F412Vx) || defined(STM32F412Rx) || defined(STM32F412Cx)
48 
49 /* Includes ------------------------------------------------------------------*/
50 #include "stm32f4xx_hal_def.h"
51 
60 /* Exported types ------------------------------------------------------------*/
69 typedef struct
70 {
71  uint32_t Timing;
75  uint32_t OwnAddress1;
78  uint32_t AddressingMode;
81  uint32_t DualAddressMode;
84  uint32_t OwnAddress2;
87  uint32_t OwnAddress2Masks;
90  uint32_t GeneralCallMode;
93  uint32_t NoStretchMode;
96 }FMPI2C_InitTypeDef;
97 
129 typedef enum
130 {
131  HAL_FMPI2C_STATE_RESET = 0x00U,
132  HAL_FMPI2C_STATE_READY = 0x20U,
133  HAL_FMPI2C_STATE_BUSY = 0x24U,
134  HAL_FMPI2C_STATE_BUSY_TX = 0x21U,
135  HAL_FMPI2C_STATE_BUSY_RX = 0x22U,
136  HAL_FMPI2C_STATE_LISTEN = 0x28U,
137  HAL_FMPI2C_STATE_BUSY_TX_LISTEN = 0x29U,
139  HAL_FMPI2C_STATE_BUSY_RX_LISTEN = 0x2AU,
141  HAL_FMPI2C_STATE_ABORT = 0x60U,
142  HAL_FMPI2C_STATE_TIMEOUT = 0xA0U,
143  HAL_FMPI2C_STATE_ERROR = 0xE0U
145 }HAL_FMPI2C_StateTypeDef;
146 
169 typedef enum
170 {
171  HAL_FMPI2C_MODE_NONE = 0x00U,
172  HAL_FMPI2C_MODE_MASTER = 0x10U,
173  HAL_FMPI2C_MODE_SLAVE = 0x20U,
174  HAL_FMPI2C_MODE_MEM = 0x40U
176 }HAL_FMPI2C_ModeTypeDef;
177 
186 #define HAL_FMPI2C_ERROR_NONE ((uint32_t)0x00000000U)
187 #define HAL_FMPI2C_ERROR_BERR ((uint32_t)0x00000001U)
188 #define HAL_FMPI2C_ERROR_ARLO ((uint32_t)0x00000002U)
189 #define HAL_FMPI2C_ERROR_AF ((uint32_t)0x00000004U)
190 #define HAL_FMPI2C_ERROR_OVR ((uint32_t)0x00000008U)
191 #define HAL_FMPI2C_ERROR_DMA ((uint32_t)0x00000010U)
192 #define HAL_FMPI2C_ERROR_TIMEOUT ((uint32_t)0x00000020U)
193 #define HAL_FMPI2C_ERROR_SIZE ((uint32_t)0x00000040U)
202 typedef struct __FMPI2C_HandleTypeDef
203 {
204  FMPI2C_TypeDef *Instance;
206  FMPI2C_InitTypeDef Init;
208  uint8_t *pBuffPtr;
210  uint16_t XferSize;
212  __IO uint16_t XferCount;
214  __IO uint32_t XferOptions;
217  __IO uint32_t PreviousState;
219  HAL_StatusTypeDef (*XferISR)(struct __FMPI2C_HandleTypeDef *hfmpi2c, uint32_t ITFlags, uint32_t ITSources);
221  DMA_HandleTypeDef *hdmatx;
223  DMA_HandleTypeDef *hdmarx;
225  HAL_LockTypeDef Lock;
227  __IO HAL_FMPI2C_StateTypeDef State;
229  __IO HAL_FMPI2C_ModeTypeDef Mode;
231  __IO uint32_t ErrorCode;
233  __IO uint32_t AddrEventCount;
234 }FMPI2C_HandleTypeDef;
242 /* Exported constants --------------------------------------------------------*/
243 
251 #define FMPI2C_NO_OPTION_FRAME ((uint32_t)0xFFFF0000U)
252 #define FMPI2C_FIRST_FRAME ((uint32_t)FMPI2C_SOFTEND_MODE)
253 #define FMPI2C_NEXT_FRAME ((uint32_t)(FMPI2C_RELOAD_MODE | FMPI2C_SOFTEND_MODE))
254 #define FMPI2C_FIRST_AND_LAST_FRAME ((uint32_t)FMPI2C_AUTOEND_MODE)
255 #define FMPI2C_LAST_FRAME ((uint32_t)FMPI2C_AUTOEND_MODE)
256 
263 #define FMPI2C_ADDRESSINGMODE_7BIT ((uint32_t)0x00000001U)
264 #define FMPI2C_ADDRESSINGMODE_10BIT ((uint32_t)0x00000002U)
265 
272 #define FMPI2C_DUALADDRESS_DISABLE ((uint32_t)0x00000000U)
273 #define FMPI2C_DUALADDRESS_ENABLE FMPI2C_OAR2_OA2EN
274 
282 #define FMPI2C_OA2_NOMASK ((uint8_t)0x00U)
283 #define FMPI2C_OA2_MASK01 ((uint8_t)0x01U)
284 #define FMPI2C_OA2_MASK02 ((uint8_t)0x02U)
285 #define FMPI2C_OA2_MASK03 ((uint8_t)0x03U)
286 #define FMPI2C_OA2_MASK04 ((uint8_t)0x04U)
287 #define FMPI2C_OA2_MASK05 ((uint8_t)0x05U)
288 #define FMPI2C_OA2_MASK06 ((uint8_t)0x06U)
289 #define FMPI2C_OA2_MASK07 ((uint8_t)0x07U)
290 
298 #define FMPI2C_GENERALCALL_DISABLE ((uint32_t)0x00000000U)
299 #define FMPI2C_GENERALCALL_ENABLE FMPI2C_CR1_GCEN
300 
307 #define FMPI2C_NOSTRETCH_DISABLE ((uint32_t)0x00000000U)
308 #define FMPI2C_NOSTRETCH_ENABLE FMPI2C_CR1_NOSTRETCH
309 
316 #define FMPI2C_MEMADD_SIZE_8BIT ((uint32_t)0x00000001U)
317 #define FMPI2C_MEMADD_SIZE_16BIT ((uint32_t)0x00000002U)
318 
326 #define FMPI2C_DIRECTION_RECEIVE ((uint32_t)0x00000000U)
327 #define FMPI2C_DIRECTION_TRANSMIT ((uint32_t)0x00000001U)
328 
336 #define FMPI2C_RELOAD_MODE FMPI2C_CR2_RELOAD
337 #define FMPI2C_AUTOEND_MODE FMPI2C_CR2_AUTOEND
338 #define FMPI2C_SOFTEND_MODE ((uint32_t)0x00000000U)
339 
348 #define FMPI2C_NO_STARTSTOP ((uint32_t)0x00000000U)
349 #define FMPI2C_GENERATE_STOP FMPI2C_CR2_STOP
350 #define FMPI2C_GENERATE_START_READ (uint32_t)(FMPI2C_CR2_START | FMPI2C_CR2_RD_WRN)
351 #define FMPI2C_GENERATE_START_WRITE FMPI2C_CR2_START
352 
363 #define FMPI2C_IT_ERRI FMPI2C_CR1_ERRIE
364 #define FMPI2C_IT_TCI FMPI2C_CR1_TCIE
365 #define FMPI2C_IT_STOPI FMPI2C_CR1_STOPIE
366 #define FMPI2C_IT_NACKI FMPI2C_CR1_NACKIE
367 #define FMPI2C_IT_ADDRI FMPI2C_CR1_ADDRIE
368 #define FMPI2C_IT_RXI FMPI2C_CR1_RXIE
369 #define FMPI2C_IT_TXI FMPI2C_CR1_TXIE
370 
377 #define FMPI2C_FLAG_TXE FMPI2C_ISR_TXE
378 #define FMPI2C_FLAG_TXIS FMPI2C_ISR_TXIS
379 #define FMPI2C_FLAG_RXNE FMPI2C_ISR_RXNE
380 #define FMPI2C_FLAG_ADDR FMPI2C_ISR_ADDR
381 #define FMPI2C_FLAG_AF FMPI2C_ISR_NACKF
382 #define FMPI2C_FLAG_STOPF FMPI2C_ISR_STOPF
383 #define FMPI2C_FLAG_TC FMPI2C_ISR_TC
384 #define FMPI2C_FLAG_TCR FMPI2C_ISR_TCR
385 #define FMPI2C_FLAG_BERR FMPI2C_ISR_BERR
386 #define FMPI2C_FLAG_ARLO FMPI2C_ISR_ARLO
387 #define FMPI2C_FLAG_OVR FMPI2C_ISR_OVR
388 #define FMPI2C_FLAG_PECERR FMPI2C_ISR_PECERR
389 #define FMPI2C_FLAG_TIMEOUT FMPI2C_ISR_TIMEOUT
390 #define FMPI2C_FLAG_ALERT FMPI2C_ISR_ALERT
391 #define FMPI2C_FLAG_BUSY FMPI2C_ISR_BUSY
392 #define FMPI2C_FLAG_DIR FMPI2C_ISR_DIR
393 
401 /* Exported macros -----------------------------------------------------------*/
402 
411 #define __HAL_FMPI2C_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_FMPI2C_STATE_RESET)
412 
427 #define __HAL_FMPI2C_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR1 |= (__INTERRUPT__))
428 
443 #define __HAL_FMPI2C_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR1 &= (~(__INTERRUPT__)))
444 
459 #define __HAL_FMPI2C_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->CR1 & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)
460 
484 #define __HAL_FMPI2C_GET_FLAG(__HANDLE__, __FLAG__) (((((__HANDLE__)->Instance->ISR) & (__FLAG__)) == (__FLAG__)) ? SET : RESET)
485 
503 #define __HAL_FMPI2C_CLEAR_FLAG(__HANDLE__, __FLAG__) (((__FLAG__) == FMPI2C_FLAG_TXE) ? ((__HANDLE__)->Instance->ISR |= (__FLAG__)) \
504  : ((__HANDLE__)->Instance->ICR = (__FLAG__)))
505 
510 #define __HAL_FMPI2C_ENABLE(__HANDLE__) (SET_BIT((__HANDLE__)->Instance->CR1, FMPI2C_CR1_PE))
511 
516 #define __HAL_FMPI2C_DISABLE(__HANDLE__) (CLEAR_BIT((__HANDLE__)->Instance->CR1, FMPI2C_CR1_PE))
517 
522 #define __HAL_FMPI2C_GENERATE_NACK(__HANDLE__) (SET_BIT((__HANDLE__)->Instance->CR2, FMPI2C_CR2_NACK))
523 
527 /* Include FMPI2C HAL Extended module */
528 #include "stm32f4xx_hal_fmpi2c_ex.h"
529 
530 /* Exported functions --------------------------------------------------------*/
538 /* Initialization and de-initialization functions******************************/
539 HAL_StatusTypeDef HAL_FMPI2C_Init(FMPI2C_HandleTypeDef *hfmpi2c);
540 HAL_StatusTypeDef HAL_FMPI2C_DeInit (FMPI2C_HandleTypeDef *hfmpi2c);
541 void HAL_FMPI2C_MspInit(FMPI2C_HandleTypeDef *hfmpi2c);
542 void HAL_FMPI2C_MspDeInit(FMPI2C_HandleTypeDef *hfmpi2c);
550 /* IO operation functions ****************************************************/
551  /******* Blocking mode: Polling */
552 HAL_StatusTypeDef HAL_FMPI2C_Master_Transmit(FMPI2C_HandleTypeDef *hfmpi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t Timeout);
553 HAL_StatusTypeDef HAL_FMPI2C_Master_Receive(FMPI2C_HandleTypeDef *hfmpi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t Timeout);
554 HAL_StatusTypeDef HAL_FMPI2C_Slave_Transmit(FMPI2C_HandleTypeDef *hfmpi2c, uint8_t *pData, uint16_t Size, uint32_t Timeout);
555 HAL_StatusTypeDef HAL_FMPI2C_Slave_Receive(FMPI2C_HandleTypeDef *hfmpi2c, uint8_t *pData, uint16_t Size, uint32_t Timeout);
556 HAL_StatusTypeDef HAL_FMPI2C_Mem_Write(FMPI2C_HandleTypeDef *hfmpi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout);
557 HAL_StatusTypeDef HAL_FMPI2C_Mem_Read(FMPI2C_HandleTypeDef *hfmpi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout);
558 HAL_StatusTypeDef HAL_FMPI2C_IsDeviceReady(FMPI2C_HandleTypeDef *hfmpi2c, uint16_t DevAddress, uint32_t Trials, uint32_t Timeout);
559 
560  /******* Non-Blocking mode: Interrupt */
561 HAL_StatusTypeDef HAL_FMPI2C_Master_Transmit_IT(FMPI2C_HandleTypeDef *hfmpi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size);
562 HAL_StatusTypeDef HAL_FMPI2C_Master_Receive_IT(FMPI2C_HandleTypeDef *hfmpi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size);
563 HAL_StatusTypeDef HAL_FMPI2C_Slave_Transmit_IT(FMPI2C_HandleTypeDef *hfmpi2c, uint8_t *pData, uint16_t Size);
564 HAL_StatusTypeDef HAL_FMPI2C_Slave_Receive_IT(FMPI2C_HandleTypeDef *hfmpi2c, uint8_t *pData, uint16_t Size);
565 HAL_StatusTypeDef HAL_FMPI2C_Mem_Write_IT(FMPI2C_HandleTypeDef *hfmpi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size);
566 HAL_StatusTypeDef HAL_FMPI2C_Mem_Read_IT(FMPI2C_HandleTypeDef *hfmpi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size);
567 
568 HAL_StatusTypeDef HAL_FMPI2C_Master_Sequential_Transmit_IT(FMPI2C_HandleTypeDef *hfmpi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions);
569 HAL_StatusTypeDef HAL_FMPI2C_Master_Sequential_Receive_IT(FMPI2C_HandleTypeDef *hfmpi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions);
570 HAL_StatusTypeDef HAL_FMPI2C_Slave_Sequential_Transmit_IT(FMPI2C_HandleTypeDef *hfmpi2c, uint8_t *pData, uint16_t Size, uint32_t XferOptions);
571 HAL_StatusTypeDef HAL_FMPI2C_Slave_Sequential_Receive_IT(FMPI2C_HandleTypeDef *hfmpi2c, uint8_t *pData, uint16_t Size, uint32_t XferOptions);
572 HAL_StatusTypeDef HAL_FMPI2C_EnableListen_IT(FMPI2C_HandleTypeDef *hfmpi2c);
573 HAL_StatusTypeDef HAL_FMPI2C_DisableListen_IT(FMPI2C_HandleTypeDef *hfmpi2c);
574 HAL_StatusTypeDef HAL_FMPI2C_Master_Abort_IT(FMPI2C_HandleTypeDef *hfmpi2c, uint16_t DevAddress);
575 
576  /******* Non-Blocking mode: DMA */
577 HAL_StatusTypeDef HAL_FMPI2C_Master_Transmit_DMA(FMPI2C_HandleTypeDef *hfmpi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size);
578 HAL_StatusTypeDef HAL_FMPI2C_Master_Receive_DMA(FMPI2C_HandleTypeDef *hfmpi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size);
579 HAL_StatusTypeDef HAL_FMPI2C_Slave_Transmit_DMA(FMPI2C_HandleTypeDef *hfmpi2c, uint8_t *pData, uint16_t Size);
580 HAL_StatusTypeDef HAL_FMPI2C_Slave_Receive_DMA(FMPI2C_HandleTypeDef *hfmpi2c, uint8_t *pData, uint16_t Size);
581 HAL_StatusTypeDef HAL_FMPI2C_Mem_Write_DMA(FMPI2C_HandleTypeDef *hfmpi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size);
582 HAL_StatusTypeDef HAL_FMPI2C_Mem_Read_DMA(FMPI2C_HandleTypeDef *hfmpi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size);
590 /******* FMPI2C IRQHandler and Callbacks used in non blocking modes (Interrupt and DMA) */
591 void HAL_FMPI2C_EV_IRQHandler(FMPI2C_HandleTypeDef *hfmpi2c);
592 void HAL_FMPI2C_ER_IRQHandler(FMPI2C_HandleTypeDef *hfmpi2c);
593 void HAL_FMPI2C_MasterTxCpltCallback(FMPI2C_HandleTypeDef *hfmpi2c);
594 void HAL_FMPI2C_MasterRxCpltCallback(FMPI2C_HandleTypeDef *hfmpi2c);
595 void HAL_FMPI2C_SlaveTxCpltCallback(FMPI2C_HandleTypeDef *hfmpi2c);
596 void HAL_FMPI2C_SlaveRxCpltCallback(FMPI2C_HandleTypeDef *hfmpi2c);
597 void HAL_FMPI2C_AddrCallback(FMPI2C_HandleTypeDef *hfmpi2c, uint8_t TransferDirection, uint16_t AddrMatchCode);
598 void HAL_FMPI2C_ListenCpltCallback(FMPI2C_HandleTypeDef *hfmpi2c);
599 void HAL_FMPI2C_MemTxCpltCallback(FMPI2C_HandleTypeDef *hfmpi2c);
600 void HAL_FMPI2C_MemRxCpltCallback(FMPI2C_HandleTypeDef *hfmpi2c);
601 void HAL_FMPI2C_ErrorCallback(FMPI2C_HandleTypeDef *hfmpi2c);
602 void HAL_FMPI2C_AbortCpltCallback(FMPI2C_HandleTypeDef *hfmpi2c);
610 /* Peripheral State, Mode and Error functions *********************************/
611 HAL_FMPI2C_StateTypeDef HAL_FMPI2C_GetState(FMPI2C_HandleTypeDef *hfmpi2c);
612 HAL_FMPI2C_ModeTypeDef HAL_FMPI2C_GetMode(FMPI2C_HandleTypeDef *hfmpi2c);
613 uint32_t HAL_FMPI2C_GetError(FMPI2C_HandleTypeDef *hfmpi2c);
614 
623 /* Private constants ---------------------------------------------------------*/
632 /* Private macros ------------------------------------------------------------*/
637 #define IS_FMPI2C_ADDRESSING_MODE(MODE) (((MODE) == FMPI2C_ADDRESSINGMODE_7BIT) || \
638  ((MODE) == FMPI2C_ADDRESSINGMODE_10BIT))
639 
640 #define IS_FMPI2C_DUAL_ADDRESS(ADDRESS) (((ADDRESS) == FMPI2C_DUALADDRESS_DISABLE) || \
641  ((ADDRESS) == FMPI2C_DUALADDRESS_ENABLE))
642 
643 #define IS_FMPI2C_OWN_ADDRESS2_MASK(MASK) (((MASK) == FMPI2C_OA2_NOMASK) || \
644  ((MASK) == FMPI2C_OA2_MASK01) || \
645  ((MASK) == FMPI2C_OA2_MASK02) || \
646  ((MASK) == FMPI2C_OA2_MASK03) || \
647  ((MASK) == FMPI2C_OA2_MASK04) || \
648  ((MASK) == FMPI2C_OA2_MASK05) || \
649  ((MASK) == FMPI2C_OA2_MASK06) || \
650  ((MASK) == FMPI2C_OA2_MASK07))
651 
652 #define IS_FMPI2C_GENERAL_CALL(CALL) (((CALL) == FMPI2C_GENERALCALL_DISABLE) || \
653  ((CALL) == FMPI2C_GENERALCALL_ENABLE))
654 
655 #define IS_FMPI2C_NO_STRETCH(STRETCH) (((STRETCH) == FMPI2C_NOSTRETCH_DISABLE) || \
656  ((STRETCH) == FMPI2C_NOSTRETCH_ENABLE))
657 
658 #define IS_FMPI2C_MEMADD_SIZE(SIZE) (((SIZE) == FMPI2C_MEMADD_SIZE_8BIT) || \
659  ((SIZE) == FMPI2C_MEMADD_SIZE_16BIT))
660 
661 #define IS_TRANSFER_MODE(MODE) (((MODE) == FMPI2C_RELOAD_MODE) || \
662  ((MODE) == FMPI2C_AUTOEND_MODE) || \
663  ((MODE) == FMPI2C_SOFTEND_MODE))
664 
665 #define IS_TRANSFER_REQUEST(REQUEST) (((REQUEST) == FMPI2C_GENERATE_STOP) || \
666  ((REQUEST) == FMPI2C_GENERATE_START_READ) || \
667  ((REQUEST) == FMPI2C_GENERATE_START_WRITE) || \
668  ((REQUEST) == FMPI2C_NO_STARTSTOP))
669 
670 #define IS_FMPI2C_TRANSFER_OPTIONS_REQUEST(REQUEST) (((REQUEST) == FMPI2C_FIRST_FRAME) || \
671  ((REQUEST) == FMPI2C_NEXT_FRAME) || \
672  ((REQUEST) == FMPI2C_FIRST_AND_LAST_FRAME) || \
673  ((REQUEST) == FMPI2C_LAST_FRAME))
674 
675 #define FMPI2C_RESET_CR2(__HANDLE__) ((__HANDLE__)->Instance->CR2 &= (uint32_t)~((uint32_t)(FMPI2C_CR2_SADD | FMPI2C_CR2_HEAD10R | FMPI2C_CR2_NBYTES | FMPI2C_CR2_RELOAD | FMPI2C_CR2_RD_WRN)))
676 
677 #define FMPI2C_GET_ADDR_MATCH(__HANDLE__) (((__HANDLE__)->Instance->ISR & FMPI2C_ISR_ADDCODE) >> 16)
678 #define FMPI2C_GET_DIR(__HANDLE__) (((__HANDLE__)->Instance->ISR & FMPI2C_ISR_DIR) >> 16)
679 #define FMPI2C_GET_STOP_MODE(__HANDLE__) ((__HANDLE__)->Instance->CR2 & FMPI2C_CR2_AUTOEND)
680 #define FMPI2C_GET_OWN_ADDRESS1(__HANDLE__) ((__HANDLE__)->Instance->OAR1 & FMPI2C_OAR1_OA1)
681 #define FMPI2C_GET_OWN_ADDRESS2(__HANDLE__) ((__HANDLE__)->Instance->OAR2 & FMPI2C_OAR2_OA2)
682 
683 #define IS_FMPI2C_OWN_ADDRESS1(ADDRESS1) ((ADDRESS1) <= (uint32_t)0x000003FFU)
684 #define IS_FMPI2C_OWN_ADDRESS2(ADDRESS2) ((ADDRESS2) <= (uint16_t)0x00FFU)
685 
686 #define FMPI2C_MEM_ADD_MSB(__ADDRESS__) ((uint8_t)((uint16_t)(((uint16_t)((__ADDRESS__) & (uint16_t)(0xFF00U))) >> 8U)))
687 #define FMPI2C_MEM_ADD_LSB(__ADDRESS__) ((uint8_t)((uint16_t)((__ADDRESS__) & (uint16_t)(0x00FFU))))
688 
689 #define FMPI2C_GENERATE_START(__ADDMODE__,__ADDRESS__) (((__ADDMODE__) == FMPI2C_ADDRESSINGMODE_7BIT) ? (uint32_t)((((uint32_t)(__ADDRESS__) & (FMPI2C_CR2_SADD)) | (FMPI2C_CR2_START) | (FMPI2C_CR2_AUTOEND)) & (~FMPI2C_CR2_RD_WRN)) : \
690  (uint32_t)((((uint32_t)(__ADDRESS__) & (FMPI2C_CR2_SADD)) | (FMPI2C_CR2_ADD10) | (FMPI2C_CR2_START)) & (~FMPI2C_CR2_RD_WRN)))
691 
695 /* Private Functions ---------------------------------------------------------*/
699 /* Private functions are defined in stm32f4xx_hal_fmpi2c.c file */
711 #endif /* STM32F410xx || STM32F446xx || STM32F412Zx || STM32F412Vx || STM32F412Rx || STM32F412Cx */
712 #ifdef __cplusplus
713 }
714 #endif
715 
716 
717 #endif /* __STM32F4xx_HAL_FMPI2C_H */
718 
719 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
stm32f4xx_hal_def.h
This file contains HAL common defines, enumeration, macros and structures definitions.
stm32f4xx_hal_fmpi2c_ex.h
Header file of FMPI2C HAL Extended module.
HAL_StatusTypeDef
HAL_StatusTypeDef
HAL Status structures definition.
Definition: stm32f4xx_hal_def.h:57
__IO
#define __IO
Definition: core_cm0.h:213
HAL_LockTypeDef
HAL_LockTypeDef
HAL Lock structures definition.
Definition: stm32f4xx_hal_def.h:68
__DMA_HandleTypeDef
DMA handle Structure definition.
Definition: stm32f4xx_hal_dma.h:157
FMPI2C_TypeDef
Inter-integrated Circuit Interface.
Definition: stm32f410cx.h:354