39 #ifndef __STM32F4xx_HAL_HCD_H 40 #define __STM32F4xx_HAL_HCD_H 45 #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) || \ 46 defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) || \ 47 defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F411xE) || defined(STM32F446xx) || \ 48 defined(STM32F469xx) || defined(STM32F479xx) || defined(STM32F412Zx) || defined(STM32F412Vx) || \ 49 defined(STM32F412Rx) || defined(STM32F412Cx) 71 HAL_HCD_STATE_RESET = 0x00U,
72 HAL_HCD_STATE_READY = 0x01U,
73 HAL_HCD_STATE_ERROR = 0x02U,
74 HAL_HCD_STATE_BUSY = 0x03U,
75 HAL_HCD_STATE_TIMEOUT = 0x04U
79 typedef USB_OTG_CfgTypeDef HCD_InitTypeDef;
80 typedef USB_OTG_HCTypeDef HCD_HCTypeDef ;
81 typedef USB_OTG_URBStateTypeDef HCD_URBStateTypeDef ;
82 typedef USB_OTG_HCStateTypeDef HCD_HCStateTypeDef ;
92 HCD_TypeDef *Instance;
96 __IO HCD_StateTypeDef State;
115 #define HCD_SPEED_HIGH 0U 116 #define HCD_SPEED_LOW 2U 117 #define HCD_SPEED_FULL 3U 125 #define HCD_PHY_ULPI 1U 126 #define HCD_PHY_EMBEDDED 2U 140 #define __HAL_HCD_ENABLE(__HANDLE__) USB_EnableGlobalInt ((__HANDLE__)->Instance) 141 #define __HAL_HCD_DISABLE(__HANDLE__) USB_DisableGlobalInt ((__HANDLE__)->Instance) 143 #define __HAL_HCD_GET_FLAG(__HANDLE__, __INTERRUPT__) ((USB_ReadInterrupts((__HANDLE__)->Instance) & (__INTERRUPT__)) == (__INTERRUPT__)) 144 #define __HAL_HCD_CLEAR_FLAG(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->GINTSTS) = (__INTERRUPT__)) 145 #define __HAL_HCD_IS_INVALID_INTERRUPT(__HANDLE__) (USB_ReadInterrupts((__HANDLE__)->Instance) == 0U) 147 #define __HAL_HCD_CLEAR_HC_INT(chnum, __INTERRUPT__) (USBx_HC(chnum)->HCINT = (__INTERRUPT__)) 148 #define __HAL_HCD_MASK_HALT_HC_INT(chnum) (USBx_HC(chnum)->HCINTMSK &= ~USB_OTG_HCINTMSK_CHHM) 149 #define __HAL_HCD_UNMASK_HALT_HC_INT(chnum) (USBx_HC(chnum)->HCINTMSK |= USB_OTG_HCINTMSK_CHHM) 150 #define __HAL_HCD_MASK_ACK_HC_INT(chnum) (USBx_HC(chnum)->HCINTMSK &= ~USB_OTG_HCINTMSK_ACKM) 151 #define __HAL_HCD_UNMASK_ACK_HC_INT(chnum) (USBx_HC(chnum)->HCINTMSK |= USB_OTG_HCINTMSK_ACKM) 177 void HAL_HCD_MspInit(HCD_HandleTypeDef *hhcd);
178 void HAL_HCD_MspDeInit(HCD_HandleTypeDef *hhcd);
197 void HAL_HCD_IRQHandler(HCD_HandleTypeDef *hhcd);
198 void HAL_HCD_SOF_Callback(HCD_HandleTypeDef *hhcd);
199 void HAL_HCD_Connect_Callback(HCD_HandleTypeDef *hhcd);
200 void HAL_HCD_Disconnect_Callback(HCD_HandleTypeDef *hhcd);
201 void HAL_HCD_HC_NotifyURBChange_Callback(HCD_HandleTypeDef *hhcd,
203 HCD_URBStateTypeDef urb_state);
223 HCD_StateTypeDef HAL_HCD_GetState(HCD_HandleTypeDef *hhcd);
224 HCD_URBStateTypeDef HAL_HCD_HC_GetURBState(HCD_HandleTypeDef *hhcd, uint8_t chnum);
225 uint32_t HAL_HCD_HC_GetXferCount(HCD_HandleTypeDef *hhcd, uint8_t chnum);
226 HCD_HCStateTypeDef HAL_HCD_HC_GetState(HCD_HandleTypeDef *hhcd, uint8_t chnum);
227 uint32_t HAL_HCD_GetCurrentFrame(HCD_HandleTypeDef *hhcd);
228 uint32_t HAL_HCD_GetCurrentSpeed(HCD_HandleTypeDef *hhcd);
__USB_OTG_Core_register
Definition: stm32f401xc.h:543
HAL_StatusTypeDef
HAL Status structures definition.
Definition: stm32f4xx_hal_def.h:57
#define __IO
Definition: core_cm0.h:213
HAL_LockTypeDef
HAL Lock structures definition.
Definition: stm32f4xx_hal_def.h:68
Header file of USB Core HAL module.