STM CMSIS
stm32f4xx_hal_pcd.h
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1 
38 /* Define to prevent recursive inclusion -------------------------------------*/
39 #ifndef __STM32F4xx_HAL_PCD_H
40 #define __STM32F4xx_HAL_PCD_H
41 
42 #ifdef __cplusplus
43  extern "C" {
44 #endif
45 #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) || \
46  defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) || \
47  defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F411xE) || defined(STM32F446xx) || \
48  defined(STM32F469xx) || defined(STM32F479xx) || defined(STM32F412Zx) || defined(STM32F412Vx) || \
49  defined(STM32F412Rx) || defined(STM32F412Cx)
50 /* Includes ------------------------------------------------------------------*/
51 #include "stm32f4xx_ll_usb.h"
52 
61 /* Exported types ------------------------------------------------------------*/
69 typedef enum
70 {
71  HAL_PCD_STATE_RESET = 0x00U,
72  HAL_PCD_STATE_READY = 0x01U,
73  HAL_PCD_STATE_ERROR = 0x02U,
74  HAL_PCD_STATE_BUSY = 0x03U,
75  HAL_PCD_STATE_TIMEOUT = 0x04U
76 } PCD_StateTypeDef;
77 
78 #ifdef USB_OTG_GLPMCFG_LPMEN
79 /* Device LPM suspend state */
80 typedef enum
81 {
82  LPM_L0 = 0x00U, /* on */
83  LPM_L1 = 0x01U, /* LPM L1 sleep */
84  LPM_L2 = 0x02U, /* suspend */
85  LPM_L3 = 0x03U /* off */
86 }PCD_LPM_StateTypeDef;
87 #endif /* USB_OTG_GLPMCFG_LPMEN */
88 
89 typedef USB_OTG_GlobalTypeDef PCD_TypeDef;
90 typedef USB_OTG_CfgTypeDef PCD_InitTypeDef;
91 typedef USB_OTG_EPTypeDef PCD_EPTypeDef ;
92 
96 typedef struct
97 {
98  PCD_TypeDef *Instance;
99  PCD_InitTypeDef Init;
100  PCD_EPTypeDef IN_ep[15];
101  PCD_EPTypeDef OUT_ep[15];
102  HAL_LockTypeDef Lock;
103  __IO PCD_StateTypeDef State;
104  uint32_t Setup[12];
105 #ifdef USB_OTG_GLPMCFG_LPMEN
106  PCD_LPM_StateTypeDef LPM_State;
107  uint32_t BESL;
108  uint32_t lpm_active;
110 #endif /* USB_OTG_GLPMCFG_LPMEN */
111 #ifdef USB_OTG_GCCFG_BCDEN
112  uint32_t battery_charging_active;
114 #endif /* USB_OTG_GCCFG_BCDEN */
115  void *pData;
116 } PCD_HandleTypeDef;
117 
122 /* Include PCD HAL Extension module */
123 #include "stm32f4xx_hal_pcd_ex.h"
124 
125 /* Exported constants --------------------------------------------------------*/
133 #define PCD_SPEED_HIGH 0U
134 #define PCD_SPEED_HIGH_IN_FULL 1U
135 #define PCD_SPEED_FULL 2U
136 
143 #define PCD_PHY_ULPI 1U
144 #define PCD_PHY_EMBEDDED 2U
145 
152 #ifndef USBD_HS_TRDT_VALUE
153  #define USBD_HS_TRDT_VALUE 9U
154 #endif /* USBD_HS_TRDT_VALUE */
155 #ifndef USBD_FS_TRDT_VALUE
156  #define USBD_FS_TRDT_VALUE 5U
157 #endif /* USBD_FS_TRDT_VALUE */
158 
166 /* Exported macros -----------------------------------------------------------*/
171 #define __HAL_PCD_ENABLE(__HANDLE__) USB_EnableGlobalInt ((__HANDLE__)->Instance)
172 #define __HAL_PCD_DISABLE(__HANDLE__) USB_DisableGlobalInt ((__HANDLE__)->Instance)
173 
174 #define __HAL_PCD_GET_FLAG(__HANDLE__, __INTERRUPT__) ((USB_ReadInterrupts((__HANDLE__)->Instance) & (__INTERRUPT__)) == (__INTERRUPT__))
175 #define __HAL_PCD_CLEAR_FLAG(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->GINTSTS) &= (__INTERRUPT__))
176 #define __HAL_PCD_IS_INVALID_INTERRUPT(__HANDLE__) (USB_ReadInterrupts((__HANDLE__)->Instance) == 0U)
177 
178 #define __HAL_PCD_UNGATE_PHYCLOCK(__HANDLE__) *(__IO uint32_t *)((uint32_t)((__HANDLE__)->Instance) + USB_OTG_PCGCCTL_BASE) &= \
179  ~(USB_OTG_PCGCCTL_STOPCLK)
180 
181 #define __HAL_PCD_GATE_PHYCLOCK(__HANDLE__) *(__IO uint32_t *)((uint32_t)((__HANDLE__)->Instance) + USB_OTG_PCGCCTL_BASE) |= USB_OTG_PCGCCTL_STOPCLK
182 
183 #define __HAL_PCD_IS_PHY_SUSPENDED(__HANDLE__) ((*(__IO uint32_t *)((uint32_t)((__HANDLE__)->Instance) + USB_OTG_PCGCCTL_BASE))&0x10U)
184 
185 #define USB_OTG_FS_WAKEUP_EXTI_RISING_EDGE ((uint32_t)0x08U)
186 #define USB_OTG_FS_WAKEUP_EXTI_FALLING_EDGE ((uint32_t)0x0CU)
187 #define USB_OTG_FS_WAKEUP_EXTI_RISING_FALLING_EDGE ((uint32_t)0x10U)
188 
189 #define USB_OTG_HS_WAKEUP_EXTI_RISING_EDGE ((uint32_t)0x08U)
190 #define USB_OTG_HS_WAKEUP_EXTI_FALLING_EDGE ((uint32_t)0x0CU)
191 #define USB_OTG_HS_WAKEUP_EXTI_RISING_FALLING_EDGE ((uint32_t)0x10U)
192 
193 #define USB_OTG_HS_WAKEUP_EXTI_LINE ((uint32_t)0x00100000U)
194 #define USB_OTG_FS_WAKEUP_EXTI_LINE ((uint32_t)0x00040000U)
196 #define __HAL_USB_OTG_HS_WAKEUP_EXTI_ENABLE_IT() EXTI->IMR |= (USB_OTG_HS_WAKEUP_EXTI_LINE)
197 #define __HAL_USB_OTG_HS_WAKEUP_EXTI_DISABLE_IT() EXTI->IMR &= ~(USB_OTG_HS_WAKEUP_EXTI_LINE)
198 #define __HAL_USB_OTG_HS_WAKEUP_EXTI_GET_FLAG() EXTI->PR & (USB_OTG_HS_WAKEUP_EXTI_LINE)
199 #define __HAL_USB_OTG_HS_WAKEUP_EXTI_CLEAR_FLAG() EXTI->PR = (USB_OTG_HS_WAKEUP_EXTI_LINE)
200 
201 #define __HAL_USB_OTG_HS_WAKEUP_EXTI_ENABLE_RISING_EDGE() do{EXTI->FTSR &= ~(USB_OTG_HS_WAKEUP_EXTI_LINE);\
202  EXTI->RTSR |= USB_OTG_HS_WAKEUP_EXTI_LINE;\
203  }while(0)
204 
205 #define __HAL_USB_OTG_HS_WAKEUP_EXTI_ENABLE_FALLING_EDGE() do{EXTI->FTSR |= (USB_OTG_HS_WAKEUP_EXTI_LINE);\
206  EXTI->RTSR &= ~(USB_OTG_HS_WAKEUP_EXTI_LINE);\
207  }while(0)
208 
209 #define __HAL_USB_OTG_HS_WAKEUP_EXTI_ENABLE_RISING_FALLING_EDGE() do{EXTI->RTSR &= ~(USB_OTG_HS_WAKEUP_EXTI_LINE);\
210  EXTI->FTSR &= ~(USB_OTG_HS_WAKEUP_EXTI_LINE);\
211  EXTI->RTSR |= USB_OTG_HS_WAKEUP_EXTI_LINE;\
212  EXTI->FTSR |= USB_OTG_HS_WAKEUP_EXTI_LINE;\
213  }while(0)
214 
215 #define __HAL_USB_OTG_HS_WAKEUP_EXTI_GENERATE_SWIT() (EXTI->SWIER |= USB_OTG_FS_WAKEUP_EXTI_LINE)
216 
217 #define __HAL_USB_OTG_FS_WAKEUP_EXTI_ENABLE_IT() EXTI->IMR |= USB_OTG_FS_WAKEUP_EXTI_LINE
218 #define __HAL_USB_OTG_FS_WAKEUP_EXTI_DISABLE_IT() EXTI->IMR &= ~(USB_OTG_FS_WAKEUP_EXTI_LINE)
219 #define __HAL_USB_OTG_FS_WAKEUP_EXTI_GET_FLAG() EXTI->PR & (USB_OTG_FS_WAKEUP_EXTI_LINE)
220 #define __HAL_USB_OTG_FS_WAKEUP_EXTI_CLEAR_FLAG() EXTI->PR = USB_OTG_FS_WAKEUP_EXTI_LINE
221 
222 #define __HAL_USB_OTG_FS_WAKEUP_EXTI_ENABLE_RISING_EDGE() do{EXTI->FTSR &= ~(USB_OTG_FS_WAKEUP_EXTI_LINE);\
223  EXTI->RTSR |= USB_OTG_FS_WAKEUP_EXTI_LINE;\
224  }while(0)
225 
226 #define __HAL_USB_OTG_FS_WAKEUP_EXTI_ENABLE_FALLING_EDGE() do{EXTI->FTSR |= (USB_OTG_FS_WAKEUP_EXTI_LINE);\
227  EXTI->RTSR &= ~(USB_OTG_FS_WAKEUP_EXTI_LINE);\
228  }while(0)
229 
230 #define __HAL_USB_OTG_FS_WAKEUP_EXTI_ENABLE_RISING_FALLING_EDGE() do{EXTI->RTSR &= ~(USB_OTG_FS_WAKEUP_EXTI_LINE);\
231  EXTI->FTSR &= ~(USB_OTG_FS_WAKEUP_EXTI_LINE);\
232  EXTI->RTSR |= USB_OTG_FS_WAKEUP_EXTI_LINE;\
233  EXTI->FTSR |= USB_OTG_FS_WAKEUP_EXTI_LINE;\
234  }while(0)
235 
236 #define __HAL_USB_OTG_FS_WAKEUP_EXTI_GENERATE_SWIT() (EXTI->SWIER |= USB_OTG_FS_WAKEUP_EXTI_LINE)
237 
241 /* Exported functions --------------------------------------------------------*/
246 /* Initialization/de-initialization functions ********************************/
250 HAL_StatusTypeDef HAL_PCD_Init(PCD_HandleTypeDef *hpcd);
251 HAL_StatusTypeDef HAL_PCD_DeInit(PCD_HandleTypeDef *hpcd);
252 void HAL_PCD_MspInit(PCD_HandleTypeDef *hpcd);
253 void HAL_PCD_MspDeInit(PCD_HandleTypeDef *hpcd);
258 /* I/O operation functions ***************************************************/
259 /* Non-Blocking mode: Interrupt */
263 /* Non-Blocking mode: Interrupt */
264 HAL_StatusTypeDef HAL_PCD_Start(PCD_HandleTypeDef *hpcd);
265 HAL_StatusTypeDef HAL_PCD_Stop(PCD_HandleTypeDef *hpcd);
266 void HAL_PCD_IRQHandler(PCD_HandleTypeDef *hpcd);
267 
268 void HAL_PCD_DataOutStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);
269 void HAL_PCD_DataInStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);
270 void HAL_PCD_SetupStageCallback(PCD_HandleTypeDef *hpcd);
271 void HAL_PCD_SOFCallback(PCD_HandleTypeDef *hpcd);
272 void HAL_PCD_ResetCallback(PCD_HandleTypeDef *hpcd);
273 void HAL_PCD_SuspendCallback(PCD_HandleTypeDef *hpcd);
274 void HAL_PCD_ResumeCallback(PCD_HandleTypeDef *hpcd);
275 void HAL_PCD_ISOOUTIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);
276 void HAL_PCD_ISOINIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);
277 void HAL_PCD_ConnectCallback(PCD_HandleTypeDef *hpcd);
278 void HAL_PCD_DisconnectCallback(PCD_HandleTypeDef *hpcd);
283 /* Peripheral Control functions **********************************************/
287 HAL_StatusTypeDef HAL_PCD_DevConnect(PCD_HandleTypeDef *hpcd);
288 HAL_StatusTypeDef HAL_PCD_DevDisconnect(PCD_HandleTypeDef *hpcd);
289 HAL_StatusTypeDef HAL_PCD_SetAddress(PCD_HandleTypeDef *hpcd, uint8_t address);
290 HAL_StatusTypeDef HAL_PCD_EP_Open(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint16_t ep_mps, uint8_t ep_type);
291 HAL_StatusTypeDef HAL_PCD_EP_Close(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
292 HAL_StatusTypeDef HAL_PCD_EP_Receive(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len);
293 HAL_StatusTypeDef HAL_PCD_EP_Transmit(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len);
294 uint16_t HAL_PCD_EP_GetRxCount(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
295 HAL_StatusTypeDef HAL_PCD_EP_SetStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
296 HAL_StatusTypeDef HAL_PCD_EP_ClrStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
297 HAL_StatusTypeDef HAL_PCD_EP_Flush(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
298 HAL_StatusTypeDef HAL_PCD_ActivateRemoteWakeup(PCD_HandleTypeDef *hpcd);
299 HAL_StatusTypeDef HAL_PCD_DeActivateRemoteWakeup(PCD_HandleTypeDef *hpcd);
304 /* Peripheral State functions ************************************************/
308 PCD_StateTypeDef HAL_PCD_GetState(PCD_HandleTypeDef *hpcd);
317 /* Private macros ------------------------------------------------------------*/
333 #endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx || STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx ||
334  STM32F401xC || STM32F401xE || STM32F411xE || STM32F446xx || STM32F469xx || STM32F479xx || STM32F412Zx || STM32F412Rx ||
335  STM32F412Vx || STM32F412Cx */
336 #ifdef __cplusplus
337 }
338 #endif
339 
340 
341 #endif /* __STM32F4xx_HAL_PCD_H */
342 
343 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
stm32f4xx_hal_pcd_ex.h
Header file of PCD HAL module.
USB_OTG_GlobalTypeDef
__USB_OTG_Core_register
Definition: stm32f401xc.h:543
HAL_StatusTypeDef
HAL_StatusTypeDef
HAL Status structures definition.
Definition: stm32f4xx_hal_def.h:57
__IO
#define __IO
Definition: core_cm0.h:213
HAL_LockTypeDef
HAL_LockTypeDef
HAL Lock structures definition.
Definition: stm32f4xx_hal_def.h:68
stm32f4xx_ll_usb.h
Header file of USB Core HAL module.