STM CMSIS
stm32f4xx_hal_pwr.h
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1 
38 /* Define to prevent recursive inclusion -------------------------------------*/
39 #ifndef __STM32F4xx_HAL_PWR_H
40 #define __STM32F4xx_HAL_PWR_H
41 
42 #ifdef __cplusplus
43  extern "C" {
44 #endif
45 
46 /* Includes ------------------------------------------------------------------*/
47 #include "stm32f4xx_hal_def.h"
48 
57 /* Exported types ------------------------------------------------------------*/
58 
66 typedef struct
67 {
68  uint32_t PVDLevel;
71  uint32_t Mode;
73 }PWR_PVDTypeDef;
74 
79 /* Exported constants --------------------------------------------------------*/
87 #define PWR_WAKEUP_PIN1 ((uint32_t)0x00000100U)
88 
95 #define PWR_PVDLEVEL_0 PWR_CR_PLS_LEV0
96 #define PWR_PVDLEVEL_1 PWR_CR_PLS_LEV1
97 #define PWR_PVDLEVEL_2 PWR_CR_PLS_LEV2
98 #define PWR_PVDLEVEL_3 PWR_CR_PLS_LEV3
99 #define PWR_PVDLEVEL_4 PWR_CR_PLS_LEV4
100 #define PWR_PVDLEVEL_5 PWR_CR_PLS_LEV5
101 #define PWR_PVDLEVEL_6 PWR_CR_PLS_LEV6
102 #define PWR_PVDLEVEL_7 PWR_CR_PLS_LEV7/* External input analog voltage
103  (Compare internally to VREFINT) */
104 
111 #define PWR_PVD_MODE_NORMAL ((uint32_t)0x00000000U)
112 #define PWR_PVD_MODE_IT_RISING ((uint32_t)0x00010001U)
113 #define PWR_PVD_MODE_IT_FALLING ((uint32_t)0x00010002U)
114 #define PWR_PVD_MODE_IT_RISING_FALLING ((uint32_t)0x00010003U)
115 #define PWR_PVD_MODE_EVENT_RISING ((uint32_t)0x00020001U)
116 #define PWR_PVD_MODE_EVENT_FALLING ((uint32_t)0x00020002U)
117 #define PWR_PVD_MODE_EVENT_RISING_FALLING ((uint32_t)0x00020003U)
126 #define PWR_MAINREGULATOR_ON ((uint32_t)0x00000000U)
127 #define PWR_LOWPOWERREGULATOR_ON PWR_CR_LPDS
128 
135 #define PWR_SLEEPENTRY_WFI ((uint8_t)0x01U)
136 #define PWR_SLEEPENTRY_WFE ((uint8_t)0x02U)
137 
144 #define PWR_STOPENTRY_WFI ((uint8_t)0x01U)
145 #define PWR_STOPENTRY_WFE ((uint8_t)0x02U)
146 
153 #define PWR_FLAG_WU PWR_CSR_WUF
154 #define PWR_FLAG_SB PWR_CSR_SBF
155 #define PWR_FLAG_PVDO PWR_CSR_PVDO
156 #define PWR_FLAG_BRR PWR_CSR_BRR
157 #define PWR_FLAG_VOSRDY PWR_CSR_VOSRDY
158 
166 /* Exported macro ------------------------------------------------------------*/
192 #define __HAL_PWR_GET_FLAG(__FLAG__) ((PWR->CSR & (__FLAG__)) == (__FLAG__))
193 
200 #define __HAL_PWR_CLEAR_FLAG(__FLAG__) (PWR->CR |= (__FLAG__) << 2U)
201 
206 #define __HAL_PWR_PVD_EXTI_ENABLE_IT() (EXTI->IMR |= (PWR_EXTI_LINE_PVD))
207 
212 #define __HAL_PWR_PVD_EXTI_DISABLE_IT() (EXTI->IMR &= ~(PWR_EXTI_LINE_PVD))
213 
218 #define __HAL_PWR_PVD_EXTI_ENABLE_EVENT() (EXTI->EMR |= (PWR_EXTI_LINE_PVD))
219 
224 #define __HAL_PWR_PVD_EXTI_DISABLE_EVENT() (EXTI->EMR &= ~(PWR_EXTI_LINE_PVD))
225 
230 #define __HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE() SET_BIT(EXTI->RTSR, PWR_EXTI_LINE_PVD)
231 
236 #define __HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE() CLEAR_BIT(EXTI->RTSR, PWR_EXTI_LINE_PVD)
237 
242 #define __HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE() SET_BIT(EXTI->FTSR, PWR_EXTI_LINE_PVD)
243 
244 
249 #define __HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE() CLEAR_BIT(EXTI->FTSR, PWR_EXTI_LINE_PVD)
250 
251 
256 #define __HAL_PWR_PVD_EXTI_ENABLE_RISING_FALLING_EDGE() do{__HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE();\
257  __HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE();\
258  }while(0)
259 
265 #define __HAL_PWR_PVD_EXTI_DISABLE_RISING_FALLING_EDGE() do{__HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE();\
266  __HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE();\
267  }while(0)
268 
273 #define __HAL_PWR_PVD_EXTI_GET_FLAG() (EXTI->PR & (PWR_EXTI_LINE_PVD))
274 
279 #define __HAL_PWR_PVD_EXTI_CLEAR_FLAG() (EXTI->PR = (PWR_EXTI_LINE_PVD))
280 
285 #define __HAL_PWR_PVD_EXTI_GENERATE_SWIT() (EXTI->SWIER |= (PWR_EXTI_LINE_PVD))
286 
291 /* Include PWR HAL Extension module */
292 #include "stm32f4xx_hal_pwr_ex.h"
293 
294 /* Exported functions --------------------------------------------------------*/
302 /* Initialization and de-initialization functions *****************************/
303 void HAL_PWR_DeInit(void);
304 void HAL_PWR_EnableBkUpAccess(void);
305 void HAL_PWR_DisableBkUpAccess(void);
313 /* Peripheral Control functions **********************************************/
314 /* PVD configuration */
315 void HAL_PWR_ConfigPVD(PWR_PVDTypeDef *sConfigPVD);
316 void HAL_PWR_EnablePVD(void);
317 void HAL_PWR_DisablePVD(void);
318 
319 /* WakeUp pins configuration */
320 void HAL_PWR_EnableWakeUpPin(uint32_t WakeUpPinx);
321 void HAL_PWR_DisableWakeUpPin(uint32_t WakeUpPinx);
322 
323 /* Low Power modes entry */
324 void HAL_PWR_EnterSTOPMode(uint32_t Regulator, uint8_t STOPEntry);
325 void HAL_PWR_EnterSLEEPMode(uint32_t Regulator, uint8_t SLEEPEntry);
326 void HAL_PWR_EnterSTANDBYMode(void);
327 
328 /* Power PVD IRQ Handler */
329 void HAL_PWR_PVD_IRQHandler(void);
330 void HAL_PWR_PVDCallback(void);
331 
332 /* Cortex System Control functions *******************************************/
333 void HAL_PWR_EnableSleepOnExit(void);
334 void HAL_PWR_DisableSleepOnExit(void);
335 void HAL_PWR_EnableSEVOnPend(void);
336 void HAL_PWR_DisableSEVOnPend(void);
345 /* Private types -------------------------------------------------------------*/
346 /* Private variables ---------------------------------------------------------*/
347 /* Private constants ---------------------------------------------------------*/
355 #define PWR_EXTI_LINE_PVD ((uint32_t)EXTI_IMR_MR16)
363 /* ------------- PWR registers bit address in the alias region ---------------*/
364 #define PWR_OFFSET (PWR_BASE - PERIPH_BASE)
365 #define PWR_CR_OFFSET 0x00U
366 #define PWR_CSR_OFFSET 0x04U
367 #define PWR_CR_OFFSET_BB (PWR_OFFSET + PWR_CR_OFFSET)
368 #define PWR_CSR_OFFSET_BB (PWR_OFFSET + PWR_CSR_OFFSET)
369 
376 /* --- CR Register ---*/
377 /* Alias word address of DBP bit */
378 #define DBP_BIT_NUMBER POSITION_VAL(PWR_CR_DBP)
379 #define CR_DBP_BB (uint32_t)(PERIPH_BB_BASE + (PWR_CR_OFFSET_BB * 32U) + (DBP_BIT_NUMBER * 4U))
380 
381 /* Alias word address of PVDE bit */
382 #define PVDE_BIT_NUMBER POSITION_VAL(PWR_CR_PVDE)
383 #define CR_PVDE_BB (uint32_t)(PERIPH_BB_BASE + (PWR_CR_OFFSET_BB * 32U) + (PVDE_BIT_NUMBER * 4U))
384 
385 /* Alias word address of PMODE bit */
386 #define PMODE_BIT_NUMBER POSITION_VAL(PWR_CR_PMODE)
387 #define CR_PMODE_BB (uint32_t)(PERIPH_BB_BASE + (PWR_CR_OFFSET_BB * 32U) + (PMODE_BIT_NUMBER * 4U))
388 
395 /* --- CSR Register ---*/
396 /* Alias word address of EWUP bit */
397 #define EWUP_BIT_NUMBER POSITION_VAL(PWR_CSR_EWUP)
398 #define CSR_EWUP_BB (PERIPH_BB_BASE + (PWR_CSR_OFFSET_BB * 32U) + (EWUP_BIT_NUMBER * 4U))
399 
406 /* Private macros ------------------------------------------------------------*/
414 #define IS_PWR_PVD_LEVEL(LEVEL) (((LEVEL) == PWR_PVDLEVEL_0) || ((LEVEL) == PWR_PVDLEVEL_1)|| \
415  ((LEVEL) == PWR_PVDLEVEL_2) || ((LEVEL) == PWR_PVDLEVEL_3)|| \
416  ((LEVEL) == PWR_PVDLEVEL_4) || ((LEVEL) == PWR_PVDLEVEL_5)|| \
417  ((LEVEL) == PWR_PVDLEVEL_6) || ((LEVEL) == PWR_PVDLEVEL_7))
418 #define IS_PWR_PVD_MODE(MODE) (((MODE) == PWR_PVD_MODE_IT_RISING)|| ((MODE) == PWR_PVD_MODE_IT_FALLING) || \
419  ((MODE) == PWR_PVD_MODE_IT_RISING_FALLING) || ((MODE) == PWR_PVD_MODE_EVENT_RISING) || \
420  ((MODE) == PWR_PVD_MODE_EVENT_FALLING) || ((MODE) == PWR_PVD_MODE_EVENT_RISING_FALLING) || \
421  ((MODE) == PWR_PVD_MODE_NORMAL))
422 #define IS_PWR_REGULATOR(REGULATOR) (((REGULATOR) == PWR_MAINREGULATOR_ON) || \
423  ((REGULATOR) == PWR_LOWPOWERREGULATOR_ON))
424 #define IS_PWR_SLEEP_ENTRY(ENTRY) (((ENTRY) == PWR_SLEEPENTRY_WFI) || ((ENTRY) == PWR_SLEEPENTRY_WFE))
425 #define IS_PWR_STOP_ENTRY(ENTRY) (((ENTRY) == PWR_STOPENTRY_WFI) || ((ENTRY) == PWR_STOPENTRY_WFE))
426 
442 #ifdef __cplusplus
443 }
444 #endif
445 
446 
447 #endif /* __STM32F4xx_HAL_PWR_H */
448 
449 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
stm32f4xx_hal_def.h
This file contains HAL common defines, enumeration, macros and structures definitions.
PWR_PVDTypeDef
PWR PVD configuration structure definition.
Definition: stm32f4xx_hal_pwr.h:66
PWR_PVDTypeDef::PVDLevel
uint32_t PVDLevel
Definition: stm32f4xx_hal_pwr.h:68
PWR_PVDTypeDef::Mode
uint32_t Mode
Definition: stm32f4xx_hal_pwr.h:71
stm32f4xx_hal_pwr_ex.h
Header file of PWR HAL Extension module.