39 #ifndef __STM32F4xx_HAL_TIM_EX_H 40 #define __STM32F4xx_HAL_TIM_EX_H 125 #define TIM_TIM2_TIM8_TRGO (0x00000000U) 126 #define TIM_TIM2_ETH_PTP (0x00000400U) 127 #define TIM_TIM2_USBFS_SOF (0x00000800U) 128 #define TIM_TIM2_USBHS_SOF (0x00000C00U) 129 #define TIM_TIM5_GPIO (0x00000000U) 130 #define TIM_TIM5_LSI (0x00000040U) 131 #define TIM_TIM5_LSE (0x00000080U) 132 #define TIM_TIM5_RTC (0x000000C0U) 133 #define TIM_TIM11_GPIO (0x00000000U) 134 #define TIM_TIM11_HSE (0x00000002U) 136 #if defined (STM32F446xx) 137 #define TIM_TIM11_SPDIFRX (0x00000001U) 143 #if defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx) 147 #define TIM_SYSTEMBREAKINPUT_HARDFAULT ((uint32_t)0x00000001U) 148 #define TIM_SYSTEMBREAKINPUT_PVD ((uint32_t)0x00000004U) 149 #define TIM_SYSTEMBREAKINPUT_HARDFAULT_PVD ((uint32_t)0x00000005U) 284 #if defined (STM32F446xx) 285 #define IS_TIM_REMAP(TIM_REMAP) (((TIM_REMAP) == TIM_TIM2_TIM8_TRGO)||\ 286 ((TIM_REMAP) == TIM_TIM2_ETH_PTP)||\ 287 ((TIM_REMAP) == TIM_TIM2_USBFS_SOF)||\ 288 ((TIM_REMAP) == TIM_TIM2_USBHS_SOF)||\ 289 ((TIM_REMAP) == TIM_TIM5_GPIO)||\ 290 ((TIM_REMAP) == TIM_TIM5_LSI)||\ 291 ((TIM_REMAP) == TIM_TIM5_LSE)||\ 292 ((TIM_REMAP) == TIM_TIM5_RTC)||\ 293 ((TIM_REMAP) == TIM_TIM11_GPIO)||\ 294 ((TIM_REMAP) == TIM_TIM11_SPDIFRX)||\ 295 ((TIM_REMAP) == TIM_TIM11_HSE)) 297 #define IS_TIM_REMAP(TIM_REMAP) (((TIM_REMAP) == TIM_TIM2_TIM8_TRGO)||\ 298 ((TIM_REMAP) == TIM_TIM2_ETH_PTP)||\ 299 ((TIM_REMAP) == TIM_TIM2_USBFS_SOF)||\ 300 ((TIM_REMAP) == TIM_TIM2_USBHS_SOF)||\ 301 ((TIM_REMAP) == TIM_TIM5_GPIO)||\ 302 ((TIM_REMAP) == TIM_TIM5_LSI)||\ 303 ((TIM_REMAP) == TIM_TIM5_LSE)||\ 304 ((TIM_REMAP) == TIM_TIM5_RTC)||\ 305 ((TIM_REMAP) == TIM_TIM11_GPIO)||\ 306 ((TIM_REMAP) == TIM_TIM11_HSE)) 309 #if defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx) 310 #define IS_TIM_SYSTEMBREAKINPUT(BREAKINPUT) (((BREAKINPUT) == TIM_SYSTEMBREAKINPUT_HARDFAULT)||\ 311 ((BREAKINPUT) == TIM_SYSTEMBREAKINPUT_PVD)||\ 312 ((BREAKINPUT) == TIM_SYSTEMBREAKINPUT_HARDFAULT_PVD)) 316 #define IS_TIM_DEADTIME(DEADTIME) ((DEADTIME) <= 0xFFU) HAL_TIM_StateTypeDef
HAL State structures definition.
Definition: stm32f4xx_hal_tim.h:265
TIM Hall sensor Configuration Structure definition.
Definition: stm32f4xx_hal_tim_ex.h:66
TIM Master configuration Structure definition.
Definition: stm32f4xx_hal_tim_ex.h:85
This file contains HAL common defines, enumeration, macros and structures definitions.
uint32_t IC1Polarity
Definition: stm32f4xx_hal_tim_ex.h:69
uint32_t OffStateRunMode
Definition: stm32f4xx_hal_tim_ex.h:98
uint32_t Commutation_Delay
Definition: stm32f4xx_hal_tim_ex.h:78
uint32_t LockLevel
Definition: stm32f4xx_hal_tim_ex.h:102
TIM Break and Dead time configuration Structure definition.
Definition: stm32f4xx_hal_tim_ex.h:96
uint32_t IC1Prescaler
Definition: stm32f4xx_hal_tim_ex.h:72
HAL_StatusTypeDef
HAL Status structures definition.
Definition: stm32f4xx_hal_def.h:57
uint32_t MasterSlaveMode
Definition: stm32f4xx_hal_tim_ex.h:89
uint32_t IC1Filter
Definition: stm32f4xx_hal_tim_ex.h:75
uint32_t AutomaticOutput
Definition: stm32f4xx_hal_tim_ex.h:110
uint32_t BreakPolarity
Definition: stm32f4xx_hal_tim_ex.h:108
uint32_t OffStateIDLEMode
Definition: stm32f4xx_hal_tim_ex.h:100
TIM Time Base Handle Structure definition.
Definition: stm32f4xx_hal_tim.h:289
uint32_t MasterOutputTrigger
Definition: stm32f4xx_hal_tim_ex.h:86
DMA handle Structure definition.
Definition: stm32f4xx_hal_dma.h:157
uint32_t DeadTime
Definition: stm32f4xx_hal_tim_ex.h:104
uint32_t BreakState
Definition: stm32f4xx_hal_tim_ex.h:106