39 #ifndef __STM32F4xx_LL_USB_H 40 #define __STM32F4xx_LL_USB_H 45 #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) || \ 46 defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) || \ 47 defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F411xE) || defined(STM32F446xx) || \ 48 defined(STM32F469xx) || defined(STM32F479xx) || defined(STM32F412Zx) || defined(STM32F412Vx) || \ 49 defined(STM32F412Rx) || defined(STM32F412Cx) 68 USB_OTG_DEVICE_MODE = 0U,
69 USB_OTG_HOST_MODE = 1U,
85 }USB_OTG_URBStateTypeDef;
101 }USB_OTG_HCStateTypeDef;
108 uint32_t dev_endpoints;
112 uint32_t Host_channels;
129 uint32_t low_power_enable;
133 uint32_t battery_charging_enable;
135 uint32_t vbus_sensing_enable;
137 uint32_t use_dedicated_ep1;
139 uint32_t use_external_vbus;
160 uint8_t data_pid_start;
163 uint8_t even_odd_frame;
166 uint16_t tx_fifo_num;
204 uint8_t process_ping;
231 USB_OTG_URBStateTypeDef urb_state;
234 USB_OTG_HCStateTypeDef state;
248 #define USB_OTG_MODE_DEVICE 0U 249 #define USB_OTG_MODE_HOST 1U 250 #define USB_OTG_MODE_DRD 2U 258 #define USB_OTG_SPEED_HIGH 0U 259 #define USB_OTG_SPEED_HIGH_IN_FULL 1U 260 #define USB_OTG_SPEED_LOW 2U 261 #define USB_OTG_SPEED_FULL 3U 269 #define USB_OTG_ULPI_PHY 1U 270 #define USB_OTG_EMBEDDED_PHY 2U 278 #define USB_OTG_HS_MAX_PACKET_SIZE 512U 279 #define USB_OTG_FS_MAX_PACKET_SIZE 64U 280 #define USB_OTG_MAX_EP0_SIZE 64U 288 #define DSTS_ENUMSPD_HS_PHY_30MHZ_OR_60MHZ (0U << 1U) 289 #define DSTS_ENUMSPD_FS_PHY_30MHZ_OR_60MHZ (1U << 1U) 290 #define DSTS_ENUMSPD_LS_PHY_6MHZ (2U << 1U) 291 #define DSTS_ENUMSPD_FS_PHY_48MHZ (3U << 1U) 299 #define DCFG_FRAME_INTERVAL_80 0U 300 #define DCFG_FRAME_INTERVAL_85 1U 301 #define DCFG_FRAME_INTERVAL_90 2U 302 #define DCFG_FRAME_INTERVAL_95 3U 310 #define DEP0CTL_MPS_64 0U 311 #define DEP0CTL_MPS_32 1U 312 #define DEP0CTL_MPS_16 2U 313 #define DEP0CTL_MPS_8 3U 321 #define EP_SPEED_LOW 0U 322 #define EP_SPEED_FULL 1U 323 #define EP_SPEED_HIGH 2U 331 #define EP_TYPE_CTRL 0U 332 #define EP_TYPE_ISOC 1U 333 #define EP_TYPE_BULK 2U 334 #define EP_TYPE_INTR 3U 335 #define EP_TYPE_MSK 3U 343 #define STS_GOUT_NAK 1U 344 #define STS_DATA_UPDT 2U 345 #define STS_XFER_COMP 3U 346 #define STS_SETUP_COMP 4U 347 #define STS_SETUP_UPDT 6U 355 #define HCFG_30_60_MHZ 0U 356 #define HCFG_48_MHZ 1U 357 #define HCFG_6_MHZ 2U 365 #define HPRT0_PRTSPD_HIGH_SPEED 0U 366 #define HPRT0_PRTSPD_FULL_SPEED 1U 367 #define HPRT0_PRTSPD_LOW_SPEED 2U 372 #define HCCHAR_CTRL 0U 373 #define HCCHAR_ISOC 1U 374 #define HCCHAR_BULK 2U 375 #define HCCHAR_INTR 3U 377 #define HC_PID_DATA0 0U 378 #define HC_PID_DATA2 1U 379 #define HC_PID_DATA1 2U 380 #define HC_PID_SETUP 3U 382 #define GRXSTS_PKTSTS_IN 2 383 #define GRXSTS_PKTSTS_IN_XFER_COMP 3 384 #define GRXSTS_PKTSTS_DATA_TOGGLE_ERR 5 385 #define GRXSTS_PKTSTS_CH_HALTED 7 387 #define USBx_PCGCCTL *(__IO uint32_t *)((uint32_t)USBx + USB_OTG_PCGCCTL_BASE) 388 #define USBx_HPRT0 *(__IO uint32_t *)((uint32_t)USBx + USB_OTG_HOST_PORT_BASE) 390 #define USBx_DEVICE ((USB_OTG_DeviceTypeDef *)((uint32_t )USBx + USB_OTG_DEVICE_BASE)) 391 #define USBx_INEP(i) ((USB_OTG_INEndpointTypeDef *)((uint32_t)USBx + USB_OTG_IN_ENDPOINT_BASE + (i)*USB_OTG_EP_REG_SIZE)) 392 #define USBx_OUTEP(i) ((USB_OTG_OUTEndpointTypeDef *)((uint32_t)USBx + USB_OTG_OUT_ENDPOINT_BASE + (i)*USB_OTG_EP_REG_SIZE)) 393 #define USBx_DFIFO(i) *(__IO uint32_t *)((uint32_t)USBx + USB_OTG_FIFO_BASE + (i) * USB_OTG_FIFO_SIZE) 395 #define USBx_HOST ((USB_OTG_HostTypeDef *)((uint32_t )USBx + USB_OTG_HOST_BASE)) 396 #define USBx_HC(i) ((USB_OTG_HostChannelTypeDef *)((uint32_t)USBx + USB_OTG_HOST_CHANNEL_BASE + (i)*USB_OTG_HOST_CHANNEL_SIZE)) 401 #define USB_MASK_INTERRUPT(__INSTANCE__, __INTERRUPT__) ((__INSTANCE__)->GINTMSK &= ~(__INTERRUPT__)) 402 #define USB_UNMASK_INTERRUPT(__INSTANCE__, __INTERRUPT__) ((__INSTANCE__)->GINTMSK |= (__INTERRUPT__)) 404 #define CLEAR_IN_EP_INTR(__EPNUM__, __INTERRUPT__) (USBx_INEP(__EPNUM__)->DIEPINT = (__INTERRUPT__)) 405 #define CLEAR_OUT_EP_INTR(__EPNUM__, __INTERRUPT__) (USBx_OUTEP(__EPNUM__)->DOEPINT = (__INTERRUPT__)) This file contains HAL common defines, enumeration, macros and structures definitions.
__USB_OTG_Core_register
Definition: stm32f401xc.h:543
HAL_StatusTypeDef
HAL Status structures definition.
Definition: stm32f4xx_hal_def.h:57