STM CMSIS
CMSIS Core Instruction Interface

Macros

#define __NOP   __nop
 No Operation. More...
 
#define __WFI   __wfi
 Wait For Interrupt. More...
 
#define __WFE   __wfe
 Wait For Event. More...
 
#define __SEV   __sev
 Send Event. More...
 
#define __ISB()
 Instruction Synchronization Barrier. More...
 
#define __DSB()
 Data Synchronization Barrier. More...
 
#define __DMB()
 Data Memory Barrier. More...
 
#define __REV   __rev
 Reverse byte order (32 bit) More...
 
#define __ROR   __ror
 Rotate Right in unsigned value (32 bit) More...
 
#define __BKPT(value)   __breakpoint(value)
 Breakpoint. More...
 
#define __CLZ   __clz
 Count leading zeros. More...
 
#define __CMSIS_GCC_OUT_REG(r)   "=r" (r)
 
#define __CMSIS_GCC_USE_REG(r)   "r" (r)
 
#define __NOP   __builtin_arm_nop
 No Operation. More...
 
#define __WFI   __builtin_arm_wfi
 Wait For Interrupt. More...
 
#define __WFE   __builtin_arm_wfe
 Wait For Event. More...
 
#define __SEV   __builtin_arm_sev
 Send Event. More...
 
#define __ISB()   __builtin_arm_isb(0xF);
 Instruction Synchronization Barrier. More...
 
#define __DSB()   __builtin_arm_dsb(0xF);
 Data Synchronization Barrier. More...
 
#define __DMB()   __builtin_arm_dmb(0xF);
 Data Memory Barrier. More...
 
#define __REV   __builtin_bswap32
 Reverse byte order (32 bit) More...
 
#define __REV16   __builtin_bswap16 /* ToDo: ARMCC_V6: check if __builtin_bswap16 could be used */
 Reverse byte order (16 bit) More...
 
#define __BKPT(value)   __ASM volatile ("bkpt "#value)
 Breakpoint. More...
 
#define __CLZ   __builtin_clz
 Count leading zeros. More...
 
#define __CMSIS_GCC_OUT_REG(r)   "=r" (r)
 
#define __CMSIS_GCC_USE_REG(r)   "r" (r)
 
#define __BKPT(value)   __ASM volatile ("bkpt "#value)
 Breakpoint. More...
 
#define __CLZ   __builtin_clz
 Count leading zeros. More...
 

Functions

 __attribute__ ((section(".rev16_text"))) __STATIC_INLINE __ASM uint32_t __REV16(uint32_t value)
 Reverse byte order (16 bit) More...
 
 __attribute__ ((section(".revsh_text"))) __STATIC_INLINE __ASM int32_t __REVSH(int32_t value)
 Reverse byte order in signed short value. More...
 
 __attribute__ ((always_inline)) __STATIC_INLINE uint32_t __RBIT(uint32_t value)
 Reverse bit order of value. More...
 

Variables

uint32_t op2
 
uint32_t op2
 

Detailed Description

Access to dedicated instructions

Macro Definition Documentation

◆ __BKPT [1/3]

#define __BKPT (   value)    __breakpoint(value)

Breakpoint.

Causes the processor to enter Debug state. Debug tools can use this to investigate system state when the instruction at a particular address is reached.

Parameters
[in]valueis ignored by the processor. If required, a debugger can use it to store additional information about the breakpoint.

◆ __BKPT [2/3]

#define __BKPT (   value)    __ASM volatile ("bkpt "#value)

Breakpoint.

Causes the processor to enter Debug state. Debug tools can use this to investigate system state when the instruction at a particular address is reached.

Parameters
[in]valueis ignored by the processor. If required, a debugger can use it to store additional information about the breakpoint.

◆ __BKPT [3/3]

#define __BKPT (   value)    __ASM volatile ("bkpt "#value)

Breakpoint.

Causes the processor to enter Debug state. Debug tools can use this to investigate system state when the instruction at a particular address is reached.

Parameters
[in]valueis ignored by the processor. If required, a debugger can use it to store additional information about the breakpoint.

◆ __CLZ [1/3]

#define __CLZ   __clz

Count leading zeros.

Counts the number of leading zeros of a data value.

Parameters
[in]valueValue to count the leading zeros
Returns
number of leading zeros in value

◆ __CLZ [2/3]

#define __CLZ   __builtin_clz

Count leading zeros.

Counts the number of leading zeros of a data value.

Parameters
[in]valueValue to count the leading zeros
Returns
number of leading zeros in value

◆ __CLZ [3/3]

#define __CLZ   __builtin_clz

Count leading zeros.

Counts the number of leading zeros of a data value.

Parameters
[in]valueValue to count the leading zeros
Returns
number of leading zeros in value

◆ __DMB [1/2]

#define __DMB ( )
Value:
do {\
__schedule_barrier();\
__dmb(0xF);\
__schedule_barrier();\
} while (0U)

Data Memory Barrier.

Ensures the apparent order of the explicit memory operations before and after the instruction, without ensuring their completion.

◆ __DMB [2/2]

#define __DMB ( )    __builtin_arm_dmb(0xF);

Data Memory Barrier.

Ensures the apparent order of the explicit memory operations before and after the instruction, without ensuring their completion.

◆ __DSB [1/2]

#define __DSB ( )
Value:
do {\
__schedule_barrier();\
__dsb(0xF);\
__schedule_barrier();\
} while (0U)

Data Synchronization Barrier.

Acts as a special kind of Data Memory Barrier. It completes when all explicit memory accesses before this instruction complete.

◆ __DSB [2/2]

#define __DSB ( )    __builtin_arm_dsb(0xF);

Data Synchronization Barrier.

Acts as a special kind of Data Memory Barrier. It completes when all explicit memory accesses before this instruction complete.

◆ __ISB [1/2]

#define __ISB ( )
Value:
do {\
__schedule_barrier();\
__isb(0xF);\
__schedule_barrier();\
} while (0U)

Instruction Synchronization Barrier.

Instruction Synchronization Barrier flushes the pipeline in the processor, so that all instructions following the ISB are fetched from cache or memory, after the instruction has been completed.

◆ __ISB [2/2]

#define __ISB ( )    __builtin_arm_isb(0xF);

Instruction Synchronization Barrier.

Instruction Synchronization Barrier flushes the pipeline in the processor, so that all instructions following the ISB are fetched from cache or memory, after the instruction has been completed.

◆ __NOP [1/2]

#define __NOP   __nop

No Operation.

No Operation does nothing. This instruction can be used for code alignment purposes.

◆ __NOP [2/2]

#define __NOP   __builtin_arm_nop

No Operation.

No Operation does nothing. This instruction can be used for code alignment purposes.

◆ __REV [1/2]

#define __REV   __rev

Reverse byte order (32 bit)

Reverses the byte order in integer value.

Parameters
[in]valueValue to reverse
Returns
Reversed value

◆ __REV [2/2]

#define __REV   __builtin_bswap32

Reverse byte order (32 bit)

Reverses the byte order in integer value.

Parameters
[in]valueValue to reverse
Returns
Reversed value

◆ __REV16

#define __REV16   __builtin_bswap16 /* ToDo: ARMCC_V6: check if __builtin_bswap16 could be used */

Reverse byte order (16 bit)

Reverses the byte order in two unsigned short values.

Parameters
[in]valueValue to reverse
Returns
Reversed value

◆ __ROR

#define __ROR   __ror

Rotate Right in unsigned value (32 bit)

Rotate Right (immediate) provides the value of the contents of a register rotated by a variable number of bits.

Parameters
[in]valueValue to rotate
[in]valueNumber of Bits to rotate
Returns
Rotated value

◆ __SEV [1/2]

#define __SEV   __sev

Send Event.

Send Event is a hint instruction. It causes an event to be signaled to the CPU.

◆ __SEV [2/2]

#define __SEV   __builtin_arm_sev

Send Event.

Send Event is a hint instruction. It causes an event to be signaled to the CPU.

◆ __WFE [1/2]

#define __WFE   __wfe

Wait For Event.

Wait For Event is a hint instruction that permits the processor to enter a low-power state until one of a number of events occurs.

◆ __WFE [2/2]

#define __WFE   __builtin_arm_wfe

Wait For Event.

Wait For Event is a hint instruction that permits the processor to enter a low-power state until one of a number of events occurs.

◆ __WFI [1/2]

#define __WFI   __wfi

Wait For Interrupt.

Wait For Interrupt is a hint instruction that suspends execution until one of a number of events occurs.

◆ __WFI [2/2]

#define __WFI   __builtin_arm_wfi

Wait For Interrupt.

Wait For Interrupt is a hint instruction that suspends execution until one of a number of events occurs.

Function Documentation

◆ __attribute__() [1/3]

__attribute__ ( (section(".rev16_text"))  )

Reverse byte order (16 bit)

Reverses the byte order in two unsigned short values.

Parameters
[in]valueValue to reverse
Returns
Reversed value

◆ __attribute__() [2/3]

__attribute__ ( (section(".revsh_text"))  )

Reverse byte order in signed short value.

Reverses the byte order in a signed short value with sign extension to integer.

Parameters
[in]valueValue to reverse
Returns
Reversed value

◆ __attribute__() [3/3]

__attribute__ ( (always_inline)  )

Reverse bit order of value.

Enable IRQ Interrupts.

Set Priority Mask.

Get Priority Mask.

Set Main Stack Pointer.

Get Main Stack Pointer.

Set Process Stack Pointer.

Get Process Stack Pointer.

Get xPSR Register.

Get APSR Register.

Get IPSR Register.

Set Control Register.

Get Control Register.

Disable IRQ Interrupts.

Reverse byte order (16 bit)

Reverse byte order (32 bit)

Data Memory Barrier.

Data Synchronization Barrier.

Instruction Synchronization Barrier.

Send Event.

Wait For Event.

Wait For Interrupt.

No Operation.

Rotate Right in unsigned value (32 bit)

Reverse byte order in signed short value.

Reverses the bit order of the given value.

Parameters
[in]valueValue to reverse
Returns
Reversed value

Reverses the byte order in a signed short value with sign extension to integer.

Parameters
[in]valueValue to reverse
Returns
Reversed value

Rotate Right (immediate) provides the value of the contents of a register rotated by a variable number of bits.

Parameters
[in]op1Value to rotate
[in]op2Number of Bits to rotate
Returns
Rotated value

No Operation does nothing. This instruction can be used for code alignment purposes.

Wait For Interrupt is a hint instruction that suspends execution until one of a number of events occurs.

Wait For Event is a hint instruction that permits the processor to enter a low-power state until one of a number of events occurs.

Send Event is a hint instruction. It causes an event to be signaled to the CPU.

Instruction Synchronization Barrier flushes the pipeline in the processor, so that all instructions following the ISB are fetched from cache or memory, after the instruction has been completed.

Acts as a special kind of Data Memory Barrier. It completes when all explicit memory accesses before this instruction complete.

Ensures the apparent order of the explicit memory operations before and after the instruction, without ensuring their completion.

Reverses the byte order in integer value.

Parameters
[in]valueValue to reverse
Returns
Reversed value

Reverses the byte order in two unsigned short values.

Parameters
[in]valueValue to reverse
Returns
Reversed value

Rotate Right (immediate) provides the value of the contents of a register rotated by a variable number of bits.

Parameters
[in]valueValue to rotate
[in]valueNumber of Bits to rotate
Returns
Rotated value

Disables IRQ interrupts by setting the I-bit in the CPSR. Can only be executed in Privileged modes.

Returns the content of the Control Register.

Returns
Control Register value

Writes the given value to the Control Register.

Parameters
[in]controlControl Register value to set

Returns the content of the IPSR Register.

Returns
IPSR Register value

Returns the content of the APSR Register.

Returns
APSR Register value

Returns the content of the xPSR Register.

Returns
xPSR Register value

Returns the current value of the Process Stack Pointer (PSP).

Returns
PSP Register value

Assigns the given value to the Process Stack Pointer (PSP).

Parameters
[in]topOfProcStackProcess Stack Pointer value to set

Returns the current value of the Main Stack Pointer (MSP).

Returns
MSP Register value

Assigns the given value to the Main Stack Pointer (MSP).

Parameters
[in]topOfMainStackMain Stack Pointer value to set

Returns the current state of the priority mask bit from the Priority Mask Register.

Returns
Priority Mask value

Assigns the given value to the Priority Mask Register.

Parameters
[in]priMaskPriority Mask

Enables IRQ interrupts by clearing the I-bit in the CPSR. Can only be executed in Privileged modes.

Variable Documentation

◆ op2 [1/2]

uint32_t op2
Initial value:
{
return (op1 >> op2) | (op1 << (32U - op2))

◆ op2 [2/2]

uint32_t op2
Initial value:
{
return (op1 >> op2) | (op1 << (32U - op2))