STM CMSIS

Macros

#define __CM4_REV   0x0001U
 Configuration of the Cortex-M4 Processor and Core Peripherals. More...
 
#define __MPU_PRESENT   1U
 
#define __NVIC_PRIO_BITS   4U
 
#define __Vendor_SysTickConfig   0U
 
#define __FPU_PRESENT   1U
 
#define __CM4_REV   0x0001U
 Configuration of the Cortex-M4 Processor and Core Peripherals. More...
 
#define __MPU_PRESENT   1U
 
#define __NVIC_PRIO_BITS   4U
 
#define __Vendor_SysTickConfig   0U
 
#define __FPU_PRESENT   1U
 
#define __CM4_REV   0x0001U
 Configuration of the Cortex-M4 Processor and Core Peripherals. More...
 
#define __MPU_PRESENT   1U
 
#define __NVIC_PRIO_BITS   4U
 
#define __Vendor_SysTickConfig   0U
 
#define __FPU_PRESENT   1U
 
#define __CM4_REV   0x0001U
 Configuration of the Cortex-M4 Processor and Core Peripherals. More...
 
#define __MPU_PRESENT   1U
 
#define __NVIC_PRIO_BITS   4U
 
#define __Vendor_SysTickConfig   0U
 
#define __FPU_PRESENT   1U
 
#define __CM4_REV   0x0001U
 Configuration of the Cortex-M4 Processor and Core Peripherals. More...
 
#define __MPU_PRESENT   1U
 
#define __NVIC_PRIO_BITS   4U
 
#define __Vendor_SysTickConfig   0U
 
#define __FPU_PRESENT   1U
 
#define __CM4_REV   0x0001U
 Configuration of the Cortex-M4 Processor and Core Peripherals. More...
 
#define __MPU_PRESENT   1U
 
#define __NVIC_PRIO_BITS   4U
 
#define __Vendor_SysTickConfig   0U
 
#define __FPU_PRESENT   1U
 
#define __CM4_REV   0x0001U
 Configuration of the Cortex-M4 Processor and Core Peripherals. More...
 
#define __MPU_PRESENT   1U
 
#define __NVIC_PRIO_BITS   4U
 
#define __Vendor_SysTickConfig   0U
 
#define __FPU_PRESENT   1U
 
#define __CM4_REV   0x0001U
 Configuration of the Cortex-M4 Processor and Core Peripherals. More...
 
#define __MPU_PRESENT   1U
 
#define __NVIC_PRIO_BITS   4U
 
#define __Vendor_SysTickConfig   0U
 
#define __FPU_PRESENT   1U
 
#define __CM4_REV   0x0001U
 Configuration of the Cortex-M4 Processor and Core Peripherals. More...
 
#define __MPU_PRESENT   1U
 
#define __NVIC_PRIO_BITS   4U
 
#define __Vendor_SysTickConfig   0U
 
#define __FPU_PRESENT   1U
 
#define __CM4_REV   0x0001U
 Configuration of the Cortex-M4 Processor and Core Peripherals. More...
 
#define __MPU_PRESENT   1U
 
#define __NVIC_PRIO_BITS   4U
 
#define __Vendor_SysTickConfig   0U
 
#define __FPU_PRESENT   1U
 
#define __CM4_REV   0x0001U
 Configuration of the Cortex-M4 Processor and Core Peripherals. More...
 
#define __MPU_PRESENT   1U
 
#define __NVIC_PRIO_BITS   4U
 
#define __Vendor_SysTickConfig   0U
 
#define __FPU_PRESENT   1U
 
#define __CM4_REV   0x0001U
 Configuration of the Cortex-M4 Processor and Core Peripherals. More...
 
#define __MPU_PRESENT   1U
 
#define __NVIC_PRIO_BITS   4U
 
#define __Vendor_SysTickConfig   0U
 
#define __FPU_PRESENT   1U
 
#define __CM4_REV   0x0001U
 Configuration of the Cortex-M4 Processor and Core Peripherals. More...
 
#define __MPU_PRESENT   1U
 
#define __NVIC_PRIO_BITS   4U
 
#define __Vendor_SysTickConfig   0U
 
#define __FPU_PRESENT   1U
 
#define __CM4_REV   0x0001U
 Configuration of the Cortex-M4 Processor and Core Peripherals. More...
 
#define __MPU_PRESENT   1U
 
#define __NVIC_PRIO_BITS   4U
 
#define __Vendor_SysTickConfig   0U
 
#define __FPU_PRESENT   1U
 
#define __CM4_REV   0x0001U
 Configuration of the Cortex-M4 Processor and Core Peripherals. More...
 
#define __MPU_PRESENT   1U
 
#define __NVIC_PRIO_BITS   4U
 
#define __Vendor_SysTickConfig   0U
 
#define __FPU_PRESENT   1U
 
#define __CM4_REV   0x0001U
 Configuration of the Cortex-M4 Processor and Core Peripherals. More...
 
#define __MPU_PRESENT   1U
 
#define __NVIC_PRIO_BITS   4U
 
#define __Vendor_SysTickConfig   0U
 
#define __FPU_PRESENT   1U
 
#define __CM4_REV   0x0001U
 Configuration of the Cortex-M4 Processor and Core Peripherals. More...
 
#define __MPU_PRESENT   1U
 
#define __NVIC_PRIO_BITS   4U
 
#define __Vendor_SysTickConfig   0U
 
#define __FPU_PRESENT   1U
 
#define __CM4_REV   0x0001U
 Configuration of the Cortex-M4 Processor and Core Peripherals. More...
 
#define __MPU_PRESENT   1U
 
#define __NVIC_PRIO_BITS   4U
 
#define __Vendor_SysTickConfig   0U
 
#define __FPU_PRESENT   1U
 
#define __CM4_REV   0x0001U
 Configuration of the Cortex-M4 Processor and Core Peripherals. More...
 
#define __MPU_PRESENT   1U
 
#define __NVIC_PRIO_BITS   4U
 
#define __Vendor_SysTickConfig   0U
 
#define __FPU_PRESENT   1U
 
#define __CM4_REV   0x0001U
 Configuration of the Cortex-M4 Processor and Core Peripherals. More...
 
#define __MPU_PRESENT   1U
 
#define __NVIC_PRIO_BITS   4U
 
#define __Vendor_SysTickConfig   0U
 
#define __FPU_PRESENT   1U
 
#define __CM4_REV   0x0001U
 Configuration of the Cortex-M4 Processor and Core Peripherals. More...
 
#define __MPU_PRESENT   1U
 
#define __NVIC_PRIO_BITS   4U
 
#define __Vendor_SysTickConfig   0U
 
#define __FPU_PRESENT   1U
 

Detailed Description

Macro Definition Documentation

◆ __CM4_REV [1/21]

#define __CM4_REV   0x0001U

Configuration of the Cortex-M4 Processor and Core Peripherals.

Core revision r0p1

◆ __CM4_REV [2/21]

#define __CM4_REV   0x0001U

Configuration of the Cortex-M4 Processor and Core Peripherals.

Core revision r0p1

◆ __CM4_REV [3/21]

#define __CM4_REV   0x0001U

Configuration of the Cortex-M4 Processor and Core Peripherals.

Core revision r0p1

◆ __CM4_REV [4/21]

#define __CM4_REV   0x0001U

Configuration of the Cortex-M4 Processor and Core Peripherals.

Core revision r0p1

◆ __CM4_REV [5/21]

#define __CM4_REV   0x0001U

Configuration of the Cortex-M4 Processor and Core Peripherals.

Core revision r0p1

◆ __CM4_REV [6/21]

#define __CM4_REV   0x0001U

Configuration of the Cortex-M4 Processor and Core Peripherals.

Core revision r0p1

◆ __CM4_REV [7/21]

#define __CM4_REV   0x0001U

Configuration of the Cortex-M4 Processor and Core Peripherals.

Core revision r0p1

◆ __CM4_REV [8/21]

#define __CM4_REV   0x0001U

Configuration of the Cortex-M4 Processor and Core Peripherals.

Core revision r0p1

◆ __CM4_REV [9/21]

#define __CM4_REV   0x0001U

Configuration of the Cortex-M4 Processor and Core Peripherals.

Core revision r0p1

◆ __CM4_REV [10/21]

#define __CM4_REV   0x0001U

Configuration of the Cortex-M4 Processor and Core Peripherals.

Core revision r0p1

◆ __CM4_REV [11/21]

#define __CM4_REV   0x0001U

Configuration of the Cortex-M4 Processor and Core Peripherals.

Core revision r0p1

◆ __CM4_REV [12/21]

#define __CM4_REV   0x0001U

Configuration of the Cortex-M4 Processor and Core Peripherals.

Core revision r0p1

◆ __CM4_REV [13/21]

#define __CM4_REV   0x0001U

Configuration of the Cortex-M4 Processor and Core Peripherals.

Core revision r0p1

◆ __CM4_REV [14/21]

#define __CM4_REV   0x0001U

Configuration of the Cortex-M4 Processor and Core Peripherals.

Core revision r0p1

◆ __CM4_REV [15/21]

#define __CM4_REV   0x0001U

Configuration of the Cortex-M4 Processor and Core Peripherals.

Core revision r0p1

◆ __CM4_REV [16/21]

#define __CM4_REV   0x0001U

Configuration of the Cortex-M4 Processor and Core Peripherals.

Core revision r0p1

◆ __CM4_REV [17/21]

#define __CM4_REV   0x0001U

Configuration of the Cortex-M4 Processor and Core Peripherals.

Core revision r0p1

◆ __CM4_REV [18/21]

#define __CM4_REV   0x0001U

Configuration of the Cortex-M4 Processor and Core Peripherals.

Core revision r0p1

◆ __CM4_REV [19/21]

#define __CM4_REV   0x0001U

Configuration of the Cortex-M4 Processor and Core Peripherals.

Core revision r0p1

◆ __CM4_REV [20/21]

#define __CM4_REV   0x0001U

Configuration of the Cortex-M4 Processor and Core Peripherals.

Core revision r0p1

◆ __CM4_REV [21/21]

#define __CM4_REV   0x0001U

Configuration of the Cortex-M4 Processor and Core Peripherals.

Core revision r0p1

◆ __FPU_PRESENT [1/21]

#define __FPU_PRESENT   1U

FPU present

◆ __FPU_PRESENT [2/21]

#define __FPU_PRESENT   1U

FPU present

◆ __FPU_PRESENT [3/21]

#define __FPU_PRESENT   1U

FPU present

◆ __FPU_PRESENT [4/21]

#define __FPU_PRESENT   1U

FPU present

◆ __FPU_PRESENT [5/21]

#define __FPU_PRESENT   1U

FPU present

◆ __FPU_PRESENT [6/21]

#define __FPU_PRESENT   1U

FPU present

◆ __FPU_PRESENT [7/21]

#define __FPU_PRESENT   1U

FPU present

◆ __FPU_PRESENT [8/21]

#define __FPU_PRESENT   1U

FPU present

◆ __FPU_PRESENT [9/21]

#define __FPU_PRESENT   1U

FPU present

◆ __FPU_PRESENT [10/21]

#define __FPU_PRESENT   1U

FPU present

◆ __FPU_PRESENT [11/21]

#define __FPU_PRESENT   1U

FPU present

◆ __FPU_PRESENT [12/21]

#define __FPU_PRESENT   1U

FPU present

◆ __FPU_PRESENT [13/21]

#define __FPU_PRESENT   1U

FPU present

◆ __FPU_PRESENT [14/21]

#define __FPU_PRESENT   1U

FPU present

◆ __FPU_PRESENT [15/21]

#define __FPU_PRESENT   1U

FPU present

◆ __FPU_PRESENT [16/21]

#define __FPU_PRESENT   1U

FPU present

◆ __FPU_PRESENT [17/21]

#define __FPU_PRESENT   1U

FPU present

◆ __FPU_PRESENT [18/21]

#define __FPU_PRESENT   1U

FPU present

◆ __FPU_PRESENT [19/21]

#define __FPU_PRESENT   1U

FPU present

◆ __FPU_PRESENT [20/21]

#define __FPU_PRESENT   1U

FPU present

◆ __FPU_PRESENT [21/21]

#define __FPU_PRESENT   1U

FPU present

◆ __MPU_PRESENT [1/21]

#define __MPU_PRESENT   1U

STM32F4XX provides an MPU

◆ __MPU_PRESENT [2/21]

#define __MPU_PRESENT   1U

STM32F4XX provides an MPU

◆ __MPU_PRESENT [3/21]

#define __MPU_PRESENT   1U

STM32F4XX provides an MPU

◆ __MPU_PRESENT [4/21]

#define __MPU_PRESENT   1U

STM32F4XX provides an MPU

◆ __MPU_PRESENT [5/21]

#define __MPU_PRESENT   1U

STM32F4XX provides an MPU

◆ __MPU_PRESENT [6/21]

#define __MPU_PRESENT   1U

STM32F4XX provides an MPU

◆ __MPU_PRESENT [7/21]

#define __MPU_PRESENT   1U

STM32F4XX provides an MPU

◆ __MPU_PRESENT [8/21]

#define __MPU_PRESENT   1U

STM32F4XX provides an MPU

◆ __MPU_PRESENT [9/21]

#define __MPU_PRESENT   1U

STM32F4XX provides an MPU

◆ __MPU_PRESENT [10/21]

#define __MPU_PRESENT   1U

STM32F4XX provides an MPU

◆ __MPU_PRESENT [11/21]

#define __MPU_PRESENT   1U

STM32F4XX provides an MPU

◆ __MPU_PRESENT [12/21]

#define __MPU_PRESENT   1U

STM32F4XX provides an MPU

◆ __MPU_PRESENT [13/21]

#define __MPU_PRESENT   1U

STM32F4XX provides an MPU

◆ __MPU_PRESENT [14/21]

#define __MPU_PRESENT   1U

STM32F4XX provides an MPU

◆ __MPU_PRESENT [15/21]

#define __MPU_PRESENT   1U

STM32F4XX provides an MPU

◆ __MPU_PRESENT [16/21]

#define __MPU_PRESENT   1U

STM32F4XX provides an MPU

◆ __MPU_PRESENT [17/21]

#define __MPU_PRESENT   1U

STM32F4XX provides an MPU

◆ __MPU_PRESENT [18/21]

#define __MPU_PRESENT   1U

STM32F4XX provides an MPU

◆ __MPU_PRESENT [19/21]

#define __MPU_PRESENT   1U

STM32F4XX provides an MPU

◆ __MPU_PRESENT [20/21]

#define __MPU_PRESENT   1U

STM32F4XX provides an MPU

◆ __MPU_PRESENT [21/21]

#define __MPU_PRESENT   1U

STM32F4XX provides an MPU

◆ __NVIC_PRIO_BITS [1/21]

#define __NVIC_PRIO_BITS   4U

STM32F4XX uses 4 Bits for the Priority Levels

◆ __NVIC_PRIO_BITS [2/21]

#define __NVIC_PRIO_BITS   4U

STM32F4XX uses 4 Bits for the Priority Levels

◆ __NVIC_PRIO_BITS [3/21]

#define __NVIC_PRIO_BITS   4U

STM32F4XX uses 4 Bits for the Priority Levels

◆ __NVIC_PRIO_BITS [4/21]

#define __NVIC_PRIO_BITS   4U

STM32F4XX uses 4 Bits for the Priority Levels

◆ __NVIC_PRIO_BITS [5/21]

#define __NVIC_PRIO_BITS   4U

STM32F4XX uses 4 Bits for the Priority Levels

◆ __NVIC_PRIO_BITS [6/21]

#define __NVIC_PRIO_BITS   4U

STM32F4XX uses 4 Bits for the Priority Levels

◆ __NVIC_PRIO_BITS [7/21]

#define __NVIC_PRIO_BITS   4U

STM32F4XX uses 4 Bits for the Priority Levels

◆ __NVIC_PRIO_BITS [8/21]

#define __NVIC_PRIO_BITS   4U

STM32F4XX uses 4 Bits for the Priority Levels

◆ __NVIC_PRIO_BITS [9/21]

#define __NVIC_PRIO_BITS   4U

STM32F4XX uses 4 Bits for the Priority Levels

◆ __NVIC_PRIO_BITS [10/21]

#define __NVIC_PRIO_BITS   4U

STM32F4XX uses 4 Bits for the Priority Levels

◆ __NVIC_PRIO_BITS [11/21]

#define __NVIC_PRIO_BITS   4U

STM32F4XX uses 4 Bits for the Priority Levels

◆ __NVIC_PRIO_BITS [12/21]

#define __NVIC_PRIO_BITS   4U

STM32F4XX uses 4 Bits for the Priority Levels

◆ __NVIC_PRIO_BITS [13/21]

#define __NVIC_PRIO_BITS   4U

STM32F4XX uses 4 Bits for the Priority Levels

◆ __NVIC_PRIO_BITS [14/21]

#define __NVIC_PRIO_BITS   4U

STM32F4XX uses 4 Bits for the Priority Levels

◆ __NVIC_PRIO_BITS [15/21]

#define __NVIC_PRIO_BITS   4U

STM32F4XX uses 4 Bits for the Priority Levels

◆ __NVIC_PRIO_BITS [16/21]

#define __NVIC_PRIO_BITS   4U

STM32F4XX uses 4 Bits for the Priority Levels

◆ __NVIC_PRIO_BITS [17/21]

#define __NVIC_PRIO_BITS   4U

STM32F4XX uses 4 Bits for the Priority Levels

◆ __NVIC_PRIO_BITS [18/21]

#define __NVIC_PRIO_BITS   4U

STM32F4XX uses 4 Bits for the Priority Levels

◆ __NVIC_PRIO_BITS [19/21]

#define __NVIC_PRIO_BITS   4U

STM32F4XX uses 4 Bits for the Priority Levels

◆ __NVIC_PRIO_BITS [20/21]

#define __NVIC_PRIO_BITS   4U

STM32F4XX uses 4 Bits for the Priority Levels

◆ __NVIC_PRIO_BITS [21/21]

#define __NVIC_PRIO_BITS   4U

STM32F4XX uses 4 Bits for the Priority Levels

◆ __Vendor_SysTickConfig [1/21]

#define __Vendor_SysTickConfig   0U

Set to 1 if different SysTick Config is used

◆ __Vendor_SysTickConfig [2/21]

#define __Vendor_SysTickConfig   0U

Set to 1 if different SysTick Config is used

◆ __Vendor_SysTickConfig [3/21]

#define __Vendor_SysTickConfig   0U

Set to 1 if different SysTick Config is used

◆ __Vendor_SysTickConfig [4/21]

#define __Vendor_SysTickConfig   0U

Set to 1 if different SysTick Config is used

◆ __Vendor_SysTickConfig [5/21]

#define __Vendor_SysTickConfig   0U

Set to 1 if different SysTick Config is used

◆ __Vendor_SysTickConfig [6/21]

#define __Vendor_SysTickConfig   0U

Set to 1 if different SysTick Config is used

◆ __Vendor_SysTickConfig [7/21]

#define __Vendor_SysTickConfig   0U

Set to 1 if different SysTick Config is used

◆ __Vendor_SysTickConfig [8/21]

#define __Vendor_SysTickConfig   0U

Set to 1 if different SysTick Config is used

◆ __Vendor_SysTickConfig [9/21]

#define __Vendor_SysTickConfig   0U

Set to 1 if different SysTick Config is used

◆ __Vendor_SysTickConfig [10/21]

#define __Vendor_SysTickConfig   0U

Set to 1 if different SysTick Config is used

◆ __Vendor_SysTickConfig [11/21]

#define __Vendor_SysTickConfig   0U

Set to 1 if different SysTick Config is used

◆ __Vendor_SysTickConfig [12/21]

#define __Vendor_SysTickConfig   0U

Set to 1 if different SysTick Config is used

◆ __Vendor_SysTickConfig [13/21]

#define __Vendor_SysTickConfig   0U

Set to 1 if different SysTick Config is used

◆ __Vendor_SysTickConfig [14/21]

#define __Vendor_SysTickConfig   0U

Set to 1 if different SysTick Config is used

◆ __Vendor_SysTickConfig [15/21]

#define __Vendor_SysTickConfig   0U

Set to 1 if different SysTick Config is used

◆ __Vendor_SysTickConfig [16/21]

#define __Vendor_SysTickConfig   0U

Set to 1 if different SysTick Config is used

◆ __Vendor_SysTickConfig [17/21]

#define __Vendor_SysTickConfig   0U

Set to 1 if different SysTick Config is used

◆ __Vendor_SysTickConfig [18/21]

#define __Vendor_SysTickConfig   0U

Set to 1 if different SysTick Config is used

◆ __Vendor_SysTickConfig [19/21]

#define __Vendor_SysTickConfig   0U

Set to 1 if different SysTick Config is used

◆ __Vendor_SysTickConfig [20/21]

#define __Vendor_SysTickConfig   0U

Set to 1 if different SysTick Config is used

◆ __Vendor_SysTickConfig [21/21]

#define __Vendor_SysTickConfig   0U

Set to 1 if different SysTick Config is used