STM CMSIS
DMA Private Macros

DMA private macros. More...

Macros

#define IS_DMA_CHANNEL(CHANNEL)
 
#define IS_DMA_DIRECTION(DIRECTION)
 
#define IS_DMA_BUFFER_SIZE(SIZE)   (((SIZE) >= 0x01U) && ((SIZE) < 0x10000U))
 
#define IS_DMA_PERIPHERAL_INC_STATE(STATE)
 
#define IS_DMA_MEMORY_INC_STATE(STATE)
 
#define IS_DMA_PERIPHERAL_DATA_SIZE(SIZE)
 
#define IS_DMA_MEMORY_DATA_SIZE(SIZE)
 
#define IS_DMA_MODE(MODE)
 
#define IS_DMA_PRIORITY(PRIORITY)
 
#define IS_DMA_FIFO_MODE_STATE(STATE)
 
#define IS_DMA_FIFO_THRESHOLD(THRESHOLD)
 
#define IS_DMA_MEMORY_BURST(BURST)
 
#define IS_DMA_PERIPHERAL_BURST(BURST)
 

Detailed Description

DMA private macros.

Macro Definition Documentation

◆ IS_DMA_CHANNEL

#define IS_DMA_CHANNEL (   CHANNEL)
Value:
(((CHANNEL) == DMA_CHANNEL_0) || \
((CHANNEL) == DMA_CHANNEL_1) || \
((CHANNEL) == DMA_CHANNEL_2) || \
((CHANNEL) == DMA_CHANNEL_3) || \
((CHANNEL) == DMA_CHANNEL_4) || \
((CHANNEL) == DMA_CHANNEL_5) || \
((CHANNEL) == DMA_CHANNEL_6) || \
((CHANNEL) == DMA_CHANNEL_7))
#define DMA_CHANNEL_6
Definition: stm32f4xx_hal_dma.h:226
#define DMA_CHANNEL_5
Definition: stm32f4xx_hal_dma.h:225
#define DMA_CHANNEL_3
Definition: stm32f4xx_hal_dma.h:223
#define DMA_CHANNEL_7
Definition: stm32f4xx_hal_dma.h:227
#define DMA_CHANNEL_4
Definition: stm32f4xx_hal_dma.h:224
#define DMA_CHANNEL_2
Definition: stm32f4xx_hal_dma.h:222
#define DMA_CHANNEL_1
Definition: stm32f4xx_hal_dma.h:221
#define DMA_CHANNEL_0
Definition: stm32f4xx_hal_dma.h:220

◆ IS_DMA_DIRECTION

#define IS_DMA_DIRECTION (   DIRECTION)
Value:
(((DIRECTION) == DMA_PERIPH_TO_MEMORY ) || \
((DIRECTION) == DMA_MEMORY_TO_PERIPH) || \
((DIRECTION) == DMA_MEMORY_TO_MEMORY))
#define DMA_PERIPH_TO_MEMORY
Definition: stm32f4xx_hal_dma.h:236
#define DMA_MEMORY_TO_MEMORY
Definition: stm32f4xx_hal_dma.h:238
#define DMA_MEMORY_TO_PERIPH
Definition: stm32f4xx_hal_dma.h:237

◆ IS_DMA_FIFO_MODE_STATE

#define IS_DMA_FIFO_MODE_STATE (   STATE)
Value:
(((STATE) == DMA_FIFOMODE_DISABLE ) || \
((STATE) == DMA_FIFOMODE_ENABLE))
#define DMA_FIFOMODE_DISABLE
Definition: stm32f4xx_hal_dma.h:312
#define DMA_FIFOMODE_ENABLE
Definition: stm32f4xx_hal_dma.h:313

◆ IS_DMA_FIFO_THRESHOLD

#define IS_DMA_FIFO_THRESHOLD (   THRESHOLD)
Value:
(((THRESHOLD) == DMA_FIFO_THRESHOLD_1QUARTERFULL ) || \
((THRESHOLD) == DMA_FIFO_THRESHOLD_HALFFULL) || \
((THRESHOLD) == DMA_FIFO_THRESHOLD_3QUARTERSFULL) || \
((THRESHOLD) == DMA_FIFO_THRESHOLD_FULL))
#define DMA_FIFO_THRESHOLD_1QUARTERFULL
Definition: stm32f4xx_hal_dma.h:322
#define DMA_FIFO_THRESHOLD_FULL
Definition: stm32f4xx_hal_dma.h:325
#define DMA_FIFO_THRESHOLD_HALFFULL
Definition: stm32f4xx_hal_dma.h:323
#define DMA_FIFO_THRESHOLD_3QUARTERSFULL
Definition: stm32f4xx_hal_dma.h:324

◆ IS_DMA_MEMORY_BURST

#define IS_DMA_MEMORY_BURST (   BURST)
Value:
(((BURST) == DMA_MBURST_SINGLE) || \
((BURST) == DMA_MBURST_INC4) || \
((BURST) == DMA_MBURST_INC8) || \
((BURST) == DMA_MBURST_INC16))

◆ IS_DMA_MEMORY_DATA_SIZE

#define IS_DMA_MEMORY_DATA_SIZE (   SIZE)
Value:
(((SIZE) == DMA_MDATAALIGN_BYTE) || \
((SIZE) == DMA_MDATAALIGN_HALFWORD) || \
((SIZE) == DMA_MDATAALIGN_WORD ))
#define DMA_MDATAALIGN_HALFWORD
Definition: stm32f4xx_hal_dma.h:279
#define DMA_MDATAALIGN_BYTE
Definition: stm32f4xx_hal_dma.h:278
#define DMA_MDATAALIGN_WORD
Definition: stm32f4xx_hal_dma.h:280

◆ IS_DMA_MEMORY_INC_STATE

#define IS_DMA_MEMORY_INC_STATE (   STATE)
Value:
(((STATE) == DMA_MINC_ENABLE) || \
((STATE) == DMA_MINC_DISABLE))
#define DMA_MINC_DISABLE
Definition: stm32f4xx_hal_dma.h:258
#define DMA_MINC_ENABLE
Definition: stm32f4xx_hal_dma.h:257

◆ IS_DMA_MODE

#define IS_DMA_MODE (   MODE)
Value:
(((MODE) == DMA_NORMAL ) || \
((MODE) == DMA_CIRCULAR) || \
((MODE) == DMA_PFCTRL))
#define DMA_PFCTRL
Definition: stm32f4xx_hal_dma.h:291
#define DMA_NORMAL
Definition: stm32f4xx_hal_dma.h:289
#define DMA_CIRCULAR
Definition: stm32f4xx_hal_dma.h:290

◆ IS_DMA_PERIPHERAL_BURST

#define IS_DMA_PERIPHERAL_BURST (   BURST)
Value:
(((BURST) == DMA_PBURST_SINGLE) || \
((BURST) == DMA_PBURST_INC4) || \
((BURST) == DMA_PBURST_INC8) || \
((BURST) == DMA_PBURST_INC16))

◆ IS_DMA_PERIPHERAL_DATA_SIZE

#define IS_DMA_PERIPHERAL_DATA_SIZE (   SIZE)
Value:
(((SIZE) == DMA_PDATAALIGN_BYTE) || \
((SIZE) == DMA_PDATAALIGN_HALFWORD) || \
((SIZE) == DMA_PDATAALIGN_WORD))
#define DMA_PDATAALIGN_WORD
Definition: stm32f4xx_hal_dma.h:269
#define DMA_PDATAALIGN_BYTE
Definition: stm32f4xx_hal_dma.h:267
#define DMA_PDATAALIGN_HALFWORD
Definition: stm32f4xx_hal_dma.h:268

◆ IS_DMA_PERIPHERAL_INC_STATE

#define IS_DMA_PERIPHERAL_INC_STATE (   STATE)
Value:
(((STATE) == DMA_PINC_ENABLE) || \
((STATE) == DMA_PINC_DISABLE))
#define DMA_PINC_ENABLE
Definition: stm32f4xx_hal_dma.h:247
#define DMA_PINC_DISABLE
Definition: stm32f4xx_hal_dma.h:248

◆ IS_DMA_PRIORITY

#define IS_DMA_PRIORITY (   PRIORITY)
Value:
(((PRIORITY) == DMA_PRIORITY_LOW ) || \
((PRIORITY) == DMA_PRIORITY_MEDIUM) || \
((PRIORITY) == DMA_PRIORITY_HIGH) || \
((PRIORITY) == DMA_PRIORITY_VERY_HIGH))
#define DMA_PRIORITY_LOW
Definition: stm32f4xx_hal_dma.h:300
#define DMA_PRIORITY_VERY_HIGH
Definition: stm32f4xx_hal_dma.h:303
#define DMA_PRIORITY_MEDIUM
Definition: stm32f4xx_hal_dma.h:301
#define DMA_PRIORITY_HIGH
Definition: stm32f4xx_hal_dma.h:302