| STM CMSIS
    | 
| Macros | |
| #define | IWDG_ENABLE_WRITE_ACCESS(__HANDLE__) WRITE_REG((__HANDLE__)->Instance->KR, IWDG_KEY_WRITE_ACCESS_ENABLE) | 
| Enable write access to IWDG_PR and IWDG_RLR registers.  More... | |
| #define | IWDG_DISABLE_WRITE_ACCESS(__HANDLE__) WRITE_REG((__HANDLE__)->Instance->KR, IWDG_KEY_WRITE_ACCESS_DISABLE) | 
| Disable write access to IWDG_PR and IWDG_RLR registers.  More... | |
| #define | IS_IWDG_PRESCALER(__PRESCALER__) | 
| Check IWDG prescaler value.  More... | |
| #define | IS_IWDG_RELOAD(__RELOAD__) ((__RELOAD__) <= IWDG_RLR_RL) | 
| Check IWDG reload value.  More... | |
| #define IS_IWDG_PRESCALER | ( | __PRESCALER__ | ) | 
Check IWDG prescaler value.
| <strong>PRESCALER</strong> | IWDG prescaler value | 
| None | 
| #define IS_IWDG_RELOAD | ( | __RELOAD__ | ) | ((__RELOAD__) <= IWDG_RLR_RL) | 
Check IWDG reload value.
| <strong>RELOAD</strong> | IWDG reload value | 
| None | 
| #define IWDG_DISABLE_WRITE_ACCESS | ( | __HANDLE__ | ) | WRITE_REG((__HANDLE__)->Instance->KR, IWDG_KEY_WRITE_ACCESS_DISABLE) | 
Disable write access to IWDG_PR and IWDG_RLR registers.
| <strong>HANDLE</strong> | IWDG handle | 
| None | 
| #define IWDG_ENABLE_WRITE_ACCESS | ( | __HANDLE__ | ) | WRITE_REG((__HANDLE__)->Instance->KR, IWDG_KEY_WRITE_ACCESS_ENABLE) | 
Enable write access to IWDG_PR and IWDG_RLR registers.
| <strong>HANDLE</strong> | IWDG handle | 
| None |