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STM CMSIS
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Macros | |
| #define | WWDG_PRESCALER_1 ((uint32_t)0x00000000U) |
| #define | WWDG_PRESCALER_2 WWDG_CFR_WDGTB0 |
| #define | WWDG_PRESCALER_4 WWDG_CFR_WDGTB1 |
| #define | WWDG_PRESCALER_8 WWDG_CFR_WDGTB |
| #define WWDG_PRESCALER_1 ((uint32_t)0x00000000U) |
WWDG counter clock = (PCLK1/4096)/1
| #define WWDG_PRESCALER_2 WWDG_CFR_WDGTB0 |
WWDG counter clock = (PCLK1/4096)/2
| #define WWDG_PRESCALER_4 WWDG_CFR_WDGTB1 |
WWDG counter clock = (PCLK1/4096)/4
| #define WWDG_PRESCALER_8 WWDG_CFR_WDGTB |
WWDG counter clock = (PCLK1/4096)/8