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STM CMSIS
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Header file of I2C HAL module. More...
Go to the source code of this file.
Classes | |
| struct | I2C_InitTypeDef |
| I2C Configuration Structure definition. More... | |
| struct | I2C_HandleTypeDef |
| I2C handle Structure definition. More... | |
Macros | |
| #define | HAL_I2C_ERROR_NONE ((uint32_t)0x00000000U) |
| #define | HAL_I2C_ERROR_BERR ((uint32_t)0x00000001U) |
| #define | HAL_I2C_ERROR_ARLO ((uint32_t)0x00000002U) |
| #define | HAL_I2C_ERROR_AF ((uint32_t)0x00000004U) |
| #define | HAL_I2C_ERROR_OVR ((uint32_t)0x00000008U) |
| #define | HAL_I2C_ERROR_DMA ((uint32_t)0x00000010U) |
| #define | HAL_I2C_ERROR_TIMEOUT ((uint32_t)0x00000020U) |
| #define | I2C_DUTYCYCLE_2 ((uint32_t)0x00000000U) |
| #define | I2C_DUTYCYCLE_16_9 I2C_CCR_DUTY |
| #define | I2C_ADDRESSINGMODE_7BIT ((uint32_t)0x00004000U) |
| #define | I2C_ADDRESSINGMODE_10BIT (I2C_OAR1_ADDMODE | ((uint32_t)0x00004000U)) |
| #define | I2C_DUALADDRESS_DISABLE ((uint32_t)0x00000000U) |
| #define | I2C_DUALADDRESS_ENABLE I2C_OAR2_ENDUAL |
| #define | I2C_GENERALCALL_DISABLE ((uint32_t)0x00000000U) |
| #define | I2C_GENERALCALL_ENABLE I2C_CR1_ENGC |
| #define | I2C_NOSTRETCH_DISABLE ((uint32_t)0x00000000U) |
| #define | I2C_NOSTRETCH_ENABLE I2C_CR1_NOSTRETCH |
| #define | I2C_MEMADD_SIZE_8BIT ((uint32_t)0x00000001U) |
| #define | I2C_MEMADD_SIZE_16BIT ((uint32_t)0x00000010U) |
| #define | I2C_DIRECTION_RECEIVE ((uint32_t)0x00000000U) |
| #define | I2C_DIRECTION_TRANSMIT ((uint32_t)0x00000001U) |
| #define | I2C_FIRST_FRAME ((uint32_t)0x00000001U) |
| #define | I2C_NEXT_FRAME ((uint32_t)0x00000002U) |
| #define | I2C_FIRST_AND_LAST_FRAME ((uint32_t)0x00000004U) |
| #define | I2C_LAST_FRAME ((uint32_t)0x00000008U) |
| #define | I2C_IT_BUF I2C_CR2_ITBUFEN |
| #define | I2C_IT_EVT I2C_CR2_ITEVTEN |
| #define | I2C_IT_ERR I2C_CR2_ITERREN |
| #define | I2C_FLAG_SMBALERT ((uint32_t)0x00018000U) |
| #define | I2C_FLAG_TIMEOUT ((uint32_t)0x00014000U) |
| #define | I2C_FLAG_PECERR ((uint32_t)0x00011000U) |
| #define | I2C_FLAG_OVR ((uint32_t)0x00010800U) |
| #define | I2C_FLAG_AF ((uint32_t)0x00010400U) |
| #define | I2C_FLAG_ARLO ((uint32_t)0x00010200U) |
| #define | I2C_FLAG_BERR ((uint32_t)0x00010100U) |
| #define | I2C_FLAG_TXE ((uint32_t)0x00010080U) |
| #define | I2C_FLAG_RXNE ((uint32_t)0x00010040U) |
| #define | I2C_FLAG_STOPF ((uint32_t)0x00010010U) |
| #define | I2C_FLAG_ADD10 ((uint32_t)0x00010008U) |
| #define | I2C_FLAG_BTF ((uint32_t)0x00010004U) |
| #define | I2C_FLAG_ADDR ((uint32_t)0x00010002U) |
| #define | I2C_FLAG_SB ((uint32_t)0x00010001U) |
| #define | I2C_FLAG_DUALF ((uint32_t)0x00100080U) |
| #define | I2C_FLAG_SMBHOST ((uint32_t)0x00100040U) |
| #define | I2C_FLAG_SMBDEFAULT ((uint32_t)0x00100020U) |
| #define | I2C_FLAG_GENCALL ((uint32_t)0x00100010U) |
| #define | I2C_FLAG_TRA ((uint32_t)0x00100004U) |
| #define | I2C_FLAG_BUSY ((uint32_t)0x00100002U) |
| #define | I2C_FLAG_MSL ((uint32_t)0x00100001U) |
| #define | __HAL_I2C_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_I2C_STATE_RESET) |
| Reset I2C handle state. More... | |
| #define | __HAL_I2C_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR2 |= (__INTERRUPT__)) |
| Enable or disable the specified I2C interrupts. More... | |
| #define | __HAL_I2C_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR2 &= (~(__INTERRUPT__))) |
| #define | __HAL_I2C_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->CR2 & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET) |
| Checks if the specified I2C interrupt source is enabled or disabled. More... | |
| #define | __HAL_I2C_GET_FLAG(__HANDLE__, __FLAG__) |
| Checks whether the specified I2C flag is set or not. More... | |
| #define | __HAL_I2C_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->SR1 = ~((__FLAG__) & I2C_FLAG_MASK)) |
| Clears the I2C pending flags which are cleared by writing 0 in a specific bit. More... | |
| #define | __HAL_I2C_CLEAR_ADDRFLAG(__HANDLE__) |
| Clears the I2C ADDR pending flag. More... | |
| #define | __HAL_I2C_CLEAR_STOPFLAG(__HANDLE__) |
| Clears the I2C STOPF pending flag. More... | |
| #define | __HAL_I2C_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 |= I2C_CR1_PE) |
| Enable the I2C peripheral. More... | |
| #define | __HAL_I2C_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 &= ~I2C_CR1_PE) |
| Disable the I2C peripheral. More... | |
| #define | I2C_FLAG_MASK ((uint32_t)0x0000FFFFU) |
| #define | I2C_FREQRANGE(__PCLK__) ((__PCLK__)/1000000U) |
| #define | I2C_RISE_TIME(__FREQRANGE__, __SPEED__) (((__SPEED__) <= 100000U) ? ((__FREQRANGE__) + 1U) : ((((__FREQRANGE__) * 300U) / 1000U) + 1U)) |
| #define | I2C_SPEED_STANDARD(__PCLK__, __SPEED__) (((((__PCLK__)/((__SPEED__) << 1U)) & I2C_CCR_CCR) < 4U)? 4U:((__PCLK__) / ((__SPEED__) << 1U))) |
| #define | I2C_SPEED_FAST(__PCLK__, __SPEED__, __DUTYCYCLE__) (((__DUTYCYCLE__) == I2C_DUTYCYCLE_2)? ((__PCLK__) / ((__SPEED__) * 3U)) : (((__PCLK__) / ((__SPEED__) * 25U)) | I2C_DUTYCYCLE_16_9)) |
| #define | I2C_SPEED(__PCLK__, __SPEED__, __DUTYCYCLE__) |
| #define | I2C_7BIT_ADD_WRITE(__ADDRESS__) ((uint8_t)((__ADDRESS__) & (~I2C_OAR1_ADD0))) |
| #define | I2C_7BIT_ADD_READ(__ADDRESS__) ((uint8_t)((__ADDRESS__) | I2C_OAR1_ADD0)) |
| #define | I2C_10BIT_ADDRESS(__ADDRESS__) ((uint8_t)((uint16_t)((__ADDRESS__) & (uint16_t)(0x00FFU)))) |
| #define | I2C_10BIT_HEADER_WRITE(__ADDRESS__) ((uint8_t)((uint16_t)((uint16_t)(((uint16_t)((__ADDRESS__) & (uint16_t)(0x0300U))) >> 7U) | (uint16_t)(0x00F0U)))) |
| #define | I2C_10BIT_HEADER_READ(__ADDRESS__) ((uint8_t)((uint16_t)((uint16_t)(((uint16_t)((__ADDRESS__) & (uint16_t)(0x0300U))) >> 7U) | (uint16_t)(0x00F1U)))) |
| #define | I2C_MEM_ADD_MSB(__ADDRESS__) ((uint8_t)((uint16_t)(((uint16_t)((__ADDRESS__) & (uint16_t)(0xFF00U))) >> 8U))) |
| #define | I2C_MEM_ADD_LSB(__ADDRESS__) ((uint8_t)((uint16_t)((__ADDRESS__) & (uint16_t)(0x00FFU)))) |
| #define | IS_I2C_DUTY_CYCLE(CYCLE) |
| #define | IS_I2C_ADDRESSING_MODE(ADDRESS) |
| #define | IS_I2C_DUAL_ADDRESS(ADDRESS) |
| #define | IS_I2C_GENERAL_CALL(CALL) |
| #define | IS_I2C_NO_STRETCH(STRETCH) |
| #define | IS_I2C_MEMADD_SIZE(SIZE) |
| #define | IS_I2C_CLOCK_SPEED(SPEED) (((SPEED) > 0) && ((SPEED) <= 400000U)) |
| #define | IS_I2C_OWN_ADDRESS1(ADDRESS1) (((ADDRESS1) & (uint32_t)(0xFFFFFC00U)) == 0U) |
| #define | IS_I2C_OWN_ADDRESS2(ADDRESS2) (((ADDRESS2) & (uint32_t)(0xFFFFFF01U)) == 0U) |
| #define | IS_I2C_TRANSFER_OPTIONS_REQUEST(REQUEST) |
Enumerations | |
| enum | HAL_I2C_StateTypeDef { HAL_I2C_STATE_RESET = 0x00U, HAL_I2C_STATE_READY = 0x20U, HAL_I2C_STATE_BUSY = 0x24U, HAL_I2C_STATE_BUSY_TX = 0x21U, HAL_I2C_STATE_BUSY_RX = 0x22U, HAL_I2C_STATE_LISTEN = 0x28U, HAL_I2C_STATE_BUSY_TX_LISTEN = 0x29U, HAL_I2C_STATE_BUSY_RX_LISTEN = 0x2AU, HAL_I2C_STATE_ABORT = 0x60U, HAL_I2C_STATE_TIMEOUT = 0xA0U, HAL_I2C_STATE_ERROR = 0xE0U } |
| HAL State structure definition. More... | |
| enum | HAL_I2C_ModeTypeDef { HAL_I2C_MODE_NONE = 0x00U, HAL_I2C_MODE_MASTER = 0x10U, HAL_I2C_MODE_SLAVE = 0x20U, HAL_I2C_MODE_MEM = 0x40U } |
| HAL Mode structure definition. More... | |
Functions | |
| HAL_StatusTypeDef | HAL_I2C_Init (I2C_HandleTypeDef *hi2c) |
| HAL_StatusTypeDef | HAL_I2C_DeInit (I2C_HandleTypeDef *hi2c) |
| void | HAL_I2C_MspInit (I2C_HandleTypeDef *hi2c) |
| void | HAL_I2C_MspDeInit (I2C_HandleTypeDef *hi2c) |
| HAL_StatusTypeDef | HAL_I2C_Master_Transmit (I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t Timeout) |
| HAL_StatusTypeDef | HAL_I2C_Master_Receive (I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t Timeout) |
| HAL_StatusTypeDef | HAL_I2C_Slave_Transmit (I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t Timeout) |
| HAL_StatusTypeDef | HAL_I2C_Slave_Receive (I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t Timeout) |
| HAL_StatusTypeDef | HAL_I2C_Mem_Write (I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout) |
| HAL_StatusTypeDef | HAL_I2C_Mem_Read (I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout) |
| HAL_StatusTypeDef | HAL_I2C_IsDeviceReady (I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Trials, uint32_t Timeout) |
| HAL_StatusTypeDef | HAL_I2C_Master_Transmit_IT (I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size) |
| HAL_StatusTypeDef | HAL_I2C_Master_Receive_IT (I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size) |
| HAL_StatusTypeDef | HAL_I2C_Slave_Transmit_IT (I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size) |
| HAL_StatusTypeDef | HAL_I2C_Slave_Receive_IT (I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size) |
| HAL_StatusTypeDef | HAL_I2C_Mem_Write_IT (I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size) |
| HAL_StatusTypeDef | HAL_I2C_Mem_Read_IT (I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size) |
| HAL_StatusTypeDef | HAL_I2C_Master_Sequential_Transmit_IT (I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions) |
| HAL_StatusTypeDef | HAL_I2C_Master_Sequential_Receive_IT (I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions) |
| HAL_StatusTypeDef | HAL_I2C_Slave_Sequential_Transmit_IT (I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t XferOptions) |
| HAL_StatusTypeDef | HAL_I2C_Slave_Sequential_Receive_IT (I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t XferOptions) |
| HAL_StatusTypeDef | HAL_I2C_Master_Abort_IT (I2C_HandleTypeDef *hi2c, uint16_t DevAddress) |
| HAL_StatusTypeDef | HAL_I2C_EnableListen_IT (I2C_HandleTypeDef *hi2c) |
| HAL_StatusTypeDef | HAL_I2C_DisableListen_IT (I2C_HandleTypeDef *hi2c) |
| HAL_StatusTypeDef | HAL_I2C_Master_Transmit_DMA (I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size) |
| HAL_StatusTypeDef | HAL_I2C_Master_Receive_DMA (I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size) |
| HAL_StatusTypeDef | HAL_I2C_Slave_Transmit_DMA (I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size) |
| HAL_StatusTypeDef | HAL_I2C_Slave_Receive_DMA (I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size) |
| HAL_StatusTypeDef | HAL_I2C_Mem_Write_DMA (I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size) |
| HAL_StatusTypeDef | HAL_I2C_Mem_Read_DMA (I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size) |
| void | HAL_I2C_EV_IRQHandler (I2C_HandleTypeDef *hi2c) |
| void | HAL_I2C_ER_IRQHandler (I2C_HandleTypeDef *hi2c) |
| void | HAL_I2C_MasterTxCpltCallback (I2C_HandleTypeDef *hi2c) |
| void | HAL_I2C_MasterRxCpltCallback (I2C_HandleTypeDef *hi2c) |
| void | HAL_I2C_SlaveTxCpltCallback (I2C_HandleTypeDef *hi2c) |
| void | HAL_I2C_SlaveRxCpltCallback (I2C_HandleTypeDef *hi2c) |
| void | HAL_I2C_AddrCallback (I2C_HandleTypeDef *hi2c, uint8_t TransferDirection, uint16_t AddrMatchCode) |
| void | HAL_I2C_ListenCpltCallback (I2C_HandleTypeDef *hi2c) |
| void | HAL_I2C_MemTxCpltCallback (I2C_HandleTypeDef *hi2c) |
| void | HAL_I2C_MemRxCpltCallback (I2C_HandleTypeDef *hi2c) |
| void | HAL_I2C_ErrorCallback (I2C_HandleTypeDef *hi2c) |
| void | HAL_I2C_AbortCpltCallback (I2C_HandleTypeDef *hi2c) |
| HAL_I2C_StateTypeDef | HAL_I2C_GetState (I2C_HandleTypeDef *hi2c) |
| HAL_I2C_ModeTypeDef | HAL_I2C_GetMode (I2C_HandleTypeDef *hi2c) |
| uint32_t | HAL_I2C_GetError (I2C_HandleTypeDef *hi2c) |
Header file of I2C HAL module.
Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met:
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.