39 #ifndef __STM32F4xx_HAL_SPI_H 40 #define __STM32F4xx_HAL_SPI_H 132 __IO uint16_t TxXferCount;
138 __IO uint16_t RxXferCount;
150 __IO HAL_SPI_StateTypeDef State;
152 __IO uint32_t ErrorCode;
168 #define HAL_SPI_ERROR_NONE ((uint32_t)0x00000000U) 169 #define HAL_SPI_ERROR_MODF ((uint32_t)0x00000001U) 170 #define HAL_SPI_ERROR_CRC ((uint32_t)0x00000002U) 171 #define HAL_SPI_ERROR_OVR ((uint32_t)0x00000004U) 172 #define HAL_SPI_ERROR_FRE ((uint32_t)0x00000008U) 173 #define HAL_SPI_ERROR_DMA ((uint32_t)0x00000010U) 174 #define HAL_SPI_ERROR_FLAG ((uint32_t)0x00000020U) 182 #define SPI_MODE_SLAVE ((uint32_t)0x00000000U) 183 #define SPI_MODE_MASTER (SPI_CR1_MSTR | SPI_CR1_SSI) 191 #define SPI_DIRECTION_2LINES ((uint32_t)0x00000000U) 192 #define SPI_DIRECTION_2LINES_RXONLY SPI_CR1_RXONLY 193 #define SPI_DIRECTION_1LINE SPI_CR1_BIDIMODE 201 #define SPI_DATASIZE_8BIT ((uint32_t)0x00000000U) 202 #define SPI_DATASIZE_16BIT SPI_CR1_DFF 210 #define SPI_POLARITY_LOW ((uint32_t)0x00000000U) 211 #define SPI_POLARITY_HIGH SPI_CR1_CPOL 219 #define SPI_PHASE_1EDGE ((uint32_t)0x00000000U) 220 #define SPI_PHASE_2EDGE SPI_CR1_CPHA 228 #define SPI_NSS_SOFT SPI_CR1_SSM 229 #define SPI_NSS_HARD_INPUT ((uint32_t)0x00000000U) 230 #define SPI_NSS_HARD_OUTPUT ((uint32_t)0x00040000U) 238 #define SPI_BAUDRATEPRESCALER_2 ((uint32_t)0x00000000U) 239 #define SPI_BAUDRATEPRESCALER_4 ((uint32_t)0x00000008U) 240 #define SPI_BAUDRATEPRESCALER_8 ((uint32_t)0x00000010U) 241 #define SPI_BAUDRATEPRESCALER_16 ((uint32_t)0x00000018U) 242 #define SPI_BAUDRATEPRESCALER_32 ((uint32_t)0x00000020U) 243 #define SPI_BAUDRATEPRESCALER_64 ((uint32_t)0x00000028U) 244 #define SPI_BAUDRATEPRESCALER_128 ((uint32_t)0x00000030U) 245 #define SPI_BAUDRATEPRESCALER_256 ((uint32_t)0x00000038U) 253 #define SPI_FIRSTBIT_MSB ((uint32_t)0x00000000U) 254 #define SPI_FIRSTBIT_LSB SPI_CR1_LSBFIRST 262 #define SPI_TIMODE_DISABLE ((uint32_t)0x00000000U) 263 #define SPI_TIMODE_ENABLE SPI_CR2_FRF 271 #define SPI_CRCCALCULATION_DISABLE ((uint32_t)0x00000000U) 272 #define SPI_CRCCALCULATION_ENABLE SPI_CR1_CRCEN 280 #define SPI_IT_TXE SPI_CR2_TXEIE 281 #define SPI_IT_RXNE SPI_CR2_RXNEIE 282 #define SPI_IT_ERR SPI_CR2_ERRIE 290 #define SPI_FLAG_RXNE SPI_SR_RXNE 291 #define SPI_FLAG_TXE SPI_SR_TXE 292 #define SPI_FLAG_BSY SPI_SR_BSY 293 #define SPI_FLAG_CRCERR SPI_SR_CRCERR 294 #define SPI_FLAG_MODF SPI_SR_MODF 295 #define SPI_FLAG_OVR SPI_SR_OVR 296 #define SPI_FLAG_FRE SPI_SR_FRE 315 #define __HAL_SPI_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_SPI_STATE_RESET) 327 #define __HAL_SPI_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR2 |= (__INTERRUPT__)) 328 #define __HAL_SPI_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR2 &= (~(__INTERRUPT__))) 340 #define __HAL_SPI_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->CR2 & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET) 356 #define __HAL_SPI_GET_FLAG(__HANDLE__, __FLAG__) ((((__HANDLE__)->Instance->SR) & (__FLAG__)) == (__FLAG__)) 363 #define __HAL_SPI_CLEAR_CRCERRFLAG(__HANDLE__) ((__HANDLE__)->Instance->SR = (uint16_t)(~SPI_FLAG_CRCERR)) 370 #define __HAL_SPI_CLEAR_MODFFLAG(__HANDLE__) \ 372 __IO uint32_t tmpreg_modf = 0x00U; \ 373 tmpreg_modf = (__HANDLE__)->Instance->SR; \ 374 (__HANDLE__)->Instance->CR1 &= (~SPI_CR1_SPE); \ 375 UNUSED(tmpreg_modf); \ 383 #define __HAL_SPI_CLEAR_OVRFLAG(__HANDLE__) \ 385 __IO uint32_t tmpreg_ovr = 0x00U; \ 386 tmpreg_ovr = (__HANDLE__)->Instance->DR; \ 387 tmpreg_ovr = (__HANDLE__)->Instance->SR; \ 388 UNUSED(tmpreg_ovr); \ 396 #define __HAL_SPI_CLEAR_FREFLAG(__HANDLE__) \ 398 __IO uint32_t tmpreg_fre = 0x00U; \ 399 tmpreg_fre = (__HANDLE__)->Instance->SR; \ 400 UNUSED(tmpreg_fre); \ 408 #define __HAL_SPI_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 |= SPI_CR1_SPE) 415 #define __HAL_SPI_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 &= (~SPI_CR1_SPE)) 494 #define SPI_1LINE_TX(__HANDLE__) ((__HANDLE__)->Instance->CR1 |= SPI_CR1_BIDIOE) 501 #define SPI_1LINE_RX(__HANDLE__) ((__HANDLE__)->Instance->CR1 &= (~SPI_CR1_BIDIOE)) 508 #define SPI_RESET_CRC(__HANDLE__) do{(__HANDLE__)->Instance->CR1 &= (uint16_t)(~SPI_CR1_CRCEN);\ 509 (__HANDLE__)->Instance->CR1 |= SPI_CR1_CRCEN;}while(0) 511 #define IS_SPI_MODE(MODE) (((MODE) == SPI_MODE_SLAVE) || \ 512 ((MODE) == SPI_MODE_MASTER)) 514 #define IS_SPI_DIRECTION(MODE) (((MODE) == SPI_DIRECTION_2LINES) || \ 515 ((MODE) == SPI_DIRECTION_2LINES_RXONLY) || \ 516 ((MODE) == SPI_DIRECTION_1LINE)) 518 #define IS_SPI_DIRECTION_2LINES(MODE) ((MODE) == SPI_DIRECTION_2LINES) 520 #define IS_SPI_DIRECTION_2LINES_OR_1LINE(MODE) (((MODE) == SPI_DIRECTION_2LINES) || \ 521 ((MODE) == SPI_DIRECTION_1LINE)) 523 #define IS_SPI_DATASIZE(DATASIZE) (((DATASIZE) == SPI_DATASIZE_16BIT) || \ 524 ((DATASIZE) == SPI_DATASIZE_8BIT)) 526 #define IS_SPI_CPOL(CPOL) (((CPOL) == SPI_POLARITY_LOW) || \ 527 ((CPOL) == SPI_POLARITY_HIGH)) 529 #define IS_SPI_CPHA(CPHA) (((CPHA) == SPI_PHASE_1EDGE) || \ 530 ((CPHA) == SPI_PHASE_2EDGE)) 532 #define IS_SPI_NSS(NSS) (((NSS) == SPI_NSS_SOFT) || \ 533 ((NSS) == SPI_NSS_HARD_INPUT) || \ 534 ((NSS) == SPI_NSS_HARD_OUTPUT)) 536 #define IS_SPI_BAUDRATE_PRESCALER(PRESCALER) (((PRESCALER) == SPI_BAUDRATEPRESCALER_2) || \ 537 ((PRESCALER) == SPI_BAUDRATEPRESCALER_4) || \ 538 ((PRESCALER) == SPI_BAUDRATEPRESCALER_8) || \ 539 ((PRESCALER) == SPI_BAUDRATEPRESCALER_16) || \ 540 ((PRESCALER) == SPI_BAUDRATEPRESCALER_32) || \ 541 ((PRESCALER) == SPI_BAUDRATEPRESCALER_64) || \ 542 ((PRESCALER) == SPI_BAUDRATEPRESCALER_128) || \ 543 ((PRESCALER) == SPI_BAUDRATEPRESCALER_256)) 545 #define IS_SPI_FIRST_BIT(BIT) (((BIT) == SPI_FIRSTBIT_MSB) || \ 546 ((BIT) == SPI_FIRSTBIT_LSB)) 548 #define IS_SPI_TIMODE(MODE) (((MODE) == SPI_TIMODE_DISABLE) || \ 549 ((MODE) == SPI_TIMODE_ENABLE)) 551 #define IS_SPI_CRC_CALCULATION(CALCULATION) (((CALCULATION) == SPI_CRCCALCULATION_DISABLE) || \ 552 ((CALCULATION) == SPI_CRCCALCULATION_ENABLE)) 554 #define IS_SPI_CRC_POLYNOMIAL(POLYNOMIAL) (((POLYNOMIAL) >= 0x01U) && ((POLYNOMIAL) <= 0xFFFFU)) Serial Peripheral Interface.
Definition: stm32f401xc.h:472
Definition: stm32f4xx_hal_spi.h:115
uint32_t CLKPhase
Definition: stm32f4xx_hal_spi.h:79
This file contains HAL common defines, enumeration, macros and structures definitions.
Definition: stm32f4xx_hal_spi.h:112
uint32_t CLKPolarity
Definition: stm32f4xx_hal_spi.h:76
Definition: stm32f4xx_hal_spi.h:110
uint32_t CRCPolynomial
Definition: stm32f4xx_hal_spi.h:101
struct __SPI_HandleTypeDef SPI_HandleTypeDef
SPI handle Structure definition.
HAL_StatusTypeDef
HAL Status structures definition.
Definition: stm32f4xx_hal_def.h:57
SPI handle Structure definition.
Definition: stm32f4xx_hal_spi.h:122
#define __IO
Definition: core_cm0.h:213
Definition: stm32f4xx_hal_spi.h:113
uint32_t TIMode
Definition: stm32f4xx_hal_spi.h:95
Definition: stm32f4xx_hal_spi.h:116
uint32_t FirstBit
Definition: stm32f4xx_hal_spi.h:92
uint32_t DataSize
Definition: stm32f4xx_hal_spi.h:73
SPI Configuration Structure definition.
Definition: stm32f4xx_hal_spi.h:65
HAL_LockTypeDef
HAL Lock structures definition.
Definition: stm32f4xx_hal_def.h:68
Definition: stm32f4xx_hal_spi.h:114
Definition: stm32f4xx_hal_spi.h:111
DMA handle Structure definition.
Definition: stm32f4xx_hal_dma.h:157
uint32_t CRCCalculation
Definition: stm32f4xx_hal_spi.h:98
uint32_t Direction
Definition: stm32f4xx_hal_spi.h:70
uint32_t BaudRatePrescaler
Definition: stm32f4xx_hal_spi.h:86
uint32_t Mode
Definition: stm32f4xx_hal_spi.h:67
uint32_t NSS
Definition: stm32f4xx_hal_spi.h:82
HAL_SPI_StateTypeDef
HAL SPI State structure definition.
Definition: stm32f4xx_hal_spi.h:108