STM CMSIS
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SPI_TypeDef Struct Reference
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Serial Peripheral Interface. More...

#include <stm32f401xc.h>

Public Attributes

__IO uint32_t CR1
 
__IO uint32_t CR2
 
__IO uint32_t SR
 
__IO uint32_t DR
 
__IO uint32_t CRCPR
 
__IO uint32_t RXCRCR
 
__IO uint32_t TXCRCR
 
__IO uint32_t I2SCFGR
 
__IO uint32_t I2SPR
 

Detailed Description

Serial Peripheral Interface.

Member Data Documentation

◆ CR1

__IO uint32_t SPI_TypeDef::CR1

SPI control register 1 (not used in I2S mode), Address offset: 0x00

◆ CR2

__IO uint32_t SPI_TypeDef::CR2

SPI control register 2, Address offset: 0x04

◆ CRCPR

__IO uint32_t SPI_TypeDef::CRCPR

SPI CRC polynomial register (not used in I2S mode), Address offset: 0x10

◆ DR

__IO uint32_t SPI_TypeDef::DR

SPI data register, Address offset: 0x0C

◆ I2SCFGR

__IO uint32_t SPI_TypeDef::I2SCFGR

SPI_I2S configuration register, Address offset: 0x1C

◆ I2SPR

__IO uint32_t SPI_TypeDef::I2SPR

SPI_I2S prescaler register, Address offset: 0x20

◆ RXCRCR

__IO uint32_t SPI_TypeDef::RXCRCR

SPI RX CRC register (not used in I2S mode), Address offset: 0x14

◆ SR

__IO uint32_t SPI_TypeDef::SR

SPI status register, Address offset: 0x08

◆ TXCRCR

__IO uint32_t SPI_TypeDef::TXCRCR

SPI TX CRC register (not used in I2S mode), Address offset: 0x18

The documentation for this struct was generated from the following files: