|
STM CMSIS
|
Header file of FLASH HAL module. More...
#include "stm32f4xx_hal_def.h"#include "stm32f4xx_hal_flash_ex.h"#include "stm32f4xx_hal_flash_ramfunc.h"Go to the source code of this file.
Classes | |
| struct | FLASH_ProcessTypeDef |
| FLASH handle Structure definition. More... | |
Macros | |
| #define | HAL_FLASH_ERROR_NONE ((uint32_t)0x00000000U) |
| #define | HAL_FLASH_ERROR_RD ((uint32_t)0x00000001U) |
| #define | HAL_FLASH_ERROR_PGS ((uint32_t)0x00000002U) |
| #define | HAL_FLASH_ERROR_PGP ((uint32_t)0x00000004U) |
| #define | HAL_FLASH_ERROR_PGA ((uint32_t)0x00000008U) |
| #define | HAL_FLASH_ERROR_WRP ((uint32_t)0x00000010U) |
| #define | HAL_FLASH_ERROR_OPERATION ((uint32_t)0x00000020U) |
| #define | FLASH_TYPEPROGRAM_BYTE ((uint32_t)0x00U) |
| #define | FLASH_TYPEPROGRAM_HALFWORD ((uint32_t)0x01U) |
| #define | FLASH_TYPEPROGRAM_WORD ((uint32_t)0x02U) |
| #define | FLASH_TYPEPROGRAM_DOUBLEWORD ((uint32_t)0x03U) |
| #define | FLASH_FLAG_EOP FLASH_SR_EOP |
| #define | FLASH_FLAG_OPERR FLASH_SR_SOP |
| #define | FLASH_FLAG_WRPERR FLASH_SR_WRPERR |
| #define | FLASH_FLAG_PGAERR FLASH_SR_PGAERR |
| #define | FLASH_FLAG_PGPERR FLASH_SR_PGPERR |
| #define | FLASH_FLAG_PGSERR FLASH_SR_PGSERR |
| #define | FLASH_FLAG_RDERR ((uint32_t)0x00000100U) |
| #define | FLASH_FLAG_BSY FLASH_SR_BSY |
| #define | FLASH_IT_EOP FLASH_CR_EOPIE |
| #define | FLASH_IT_ERR ((uint32_t)0x02000000U) |
| #define | FLASH_PSIZE_BYTE ((uint32_t)0x00000000U) |
| #define | FLASH_PSIZE_HALF_WORD ((uint32_t)0x00000100U) |
| #define | FLASH_PSIZE_WORD ((uint32_t)0x00000200U) |
| #define | FLASH_PSIZE_DOUBLE_WORD ((uint32_t)0x00000300U) |
| #define | CR_PSIZE_MASK ((uint32_t)0xFFFFFCFFU) |
| #define | RDP_KEY ((uint16_t)0x00A5U) |
| #define | FLASH_KEY1 ((uint32_t)0x45670123U) |
| #define | FLASH_KEY2 ((uint32_t)0xCDEF89ABU) |
| #define | FLASH_OPT_KEY1 ((uint32_t)0x08192A3BU) |
| #define | FLASH_OPT_KEY2 ((uint32_t)0x4C5D6E7FU) |
| #define | __HAL_FLASH_SET_LATENCY(__LATENCY__) (*(__IO uint8_t *)ACR_BYTE0_ADDRESS = (uint8_t)(__LATENCY__)) |
| Set the FLASH Latency. More... | |
| #define | __HAL_FLASH_GET_LATENCY() (READ_BIT((FLASH->ACR), FLASH_ACR_LATENCY)) |
| Get the FLASH Latency. More... | |
| #define | __HAL_FLASH_PREFETCH_BUFFER_ENABLE() (FLASH->ACR |= FLASH_ACR_PRFTEN) |
| Enable the FLASH prefetch buffer. More... | |
| #define | __HAL_FLASH_PREFETCH_BUFFER_DISABLE() (FLASH->ACR &= (~FLASH_ACR_PRFTEN)) |
| Disable the FLASH prefetch buffer. More... | |
| #define | __HAL_FLASH_INSTRUCTION_CACHE_ENABLE() (FLASH->ACR |= FLASH_ACR_ICEN) |
| Enable the FLASH instruction cache. More... | |
| #define | __HAL_FLASH_INSTRUCTION_CACHE_DISABLE() (FLASH->ACR &= (~FLASH_ACR_ICEN)) |
| Disable the FLASH instruction cache. More... | |
| #define | __HAL_FLASH_DATA_CACHE_ENABLE() (FLASH->ACR |= FLASH_ACR_DCEN) |
| Enable the FLASH data cache. More... | |
| #define | __HAL_FLASH_DATA_CACHE_DISABLE() (FLASH->ACR &= (~FLASH_ACR_DCEN)) |
| Disable the FLASH data cache. More... | |
| #define | __HAL_FLASH_INSTRUCTION_CACHE_RESET() |
| Resets the FLASH instruction Cache. More... | |
| #define | __HAL_FLASH_DATA_CACHE_RESET() |
| Resets the FLASH data Cache. More... | |
| #define | __HAL_FLASH_ENABLE_IT(__INTERRUPT__) (FLASH->CR |= (__INTERRUPT__)) |
| Enable the specified FLASH interrupt. More... | |
| #define | __HAL_FLASH_DISABLE_IT(__INTERRUPT__) (FLASH->CR &= ~(uint32_t)(__INTERRUPT__)) |
| Disable the specified FLASH interrupt. More... | |
| #define | __HAL_FLASH_GET_FLAG(__FLAG__) ((FLASH->SR & (__FLAG__))==(__FLAG__)) |
| Get the specified FLASH flag status. More... | |
| #define | __HAL_FLASH_CLEAR_FLAG(__FLAG__) (FLASH->SR = (__FLAG__)) |
| Clear the specified FLASH flag. More... | |
| #define | ACR_BYTE0_ADDRESS ((uint32_t)0x40023C00U) |
| ACR register byte 0 (Bits[7:0]) base address. | |
| #define | OPTCR_BYTE0_ADDRESS ((uint32_t)0x40023C14U) |
| OPTCR register byte 0 (Bits[7:0]) base address. | |
| #define | OPTCR_BYTE1_ADDRESS ((uint32_t)0x40023C15U) |
| OPTCR register byte 1 (Bits[15:8]) base address. | |
| #define | OPTCR_BYTE2_ADDRESS ((uint32_t)0x40023C16U) |
| OPTCR register byte 2 (Bits[23:16]) base address. | |
| #define | OPTCR_BYTE3_ADDRESS ((uint32_t)0x40023C17U) |
| OPTCR register byte 3 (Bits[31:24]) base address. | |
| #define | IS_FLASH_TYPEPROGRAM(VALUE) |
Enumerations | |
| enum | FLASH_ProcedureTypeDef { FLASH_PROC_NONE = 0U, FLASH_PROC_SECTERASE, FLASH_PROC_MASSERASE, FLASH_PROC_PROGRAM } |
| FLASH Procedure structure definition. | |
Functions | |
| HAL_StatusTypeDef | HAL_FLASH_Program (uint32_t TypeProgram, uint32_t Address, uint64_t Data) |
| HAL_StatusTypeDef | HAL_FLASH_Program_IT (uint32_t TypeProgram, uint32_t Address, uint64_t Data) |
| void | HAL_FLASH_IRQHandler (void) |
| void | HAL_FLASH_EndOfOperationCallback (uint32_t ReturnValue) |
| void | HAL_FLASH_OperationErrorCallback (uint32_t ReturnValue) |
| HAL_StatusTypeDef | HAL_FLASH_Unlock (void) |
| HAL_StatusTypeDef | HAL_FLASH_Lock (void) |
| HAL_StatusTypeDef | HAL_FLASH_OB_Unlock (void) |
| HAL_StatusTypeDef | HAL_FLASH_OB_Lock (void) |
| HAL_StatusTypeDef | HAL_FLASH_OB_Launch (void) |
| uint32_t | HAL_FLASH_GetError (void) |
| HAL_StatusTypeDef | FLASH_WaitForLastOperation (uint32_t Timeout) |
Header file of FLASH HAL module.
Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met:
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.