STM CMSIS
Public Attributes | List of all members
RTC_TypeDef Struct Reference
CMSIS » Stm32f401xcCMSIS » | Stm32f401xeCMSIS » | Stm32f405xxCMSIS » | Stm32f407xxCMSIS » | Stm32f410cxCMSIS » | Stm32f410rxCMSIS » | Stm32f410txCMSIS » | Stm32f411xeCMSIS » | Stm32f412cxCMSIS » | Stm32f412rxCMSIS » | Stm32f412vxCMSIS » | Stm32f412zxCMSIS » | Stm32f415xxCMSIS » | Stm32f417xxCMSIS_Device » | Stm32f427xxCMSIS_Device » | Stm32f429xxCMSIS_Device » | Stm32f437xxCMSIS_Device » | Stm32f439xxCMSIS_Device » | Stm32f446xxCMSIS_Device » | Stm32f469xxCMSIS_Device » | Stm32f479xx » Peripheral_registers_structures

Real-Time Clock. More...

#include <stm32f401xc.h>

Public Attributes

__IO uint32_t TR
 
__IO uint32_t DR
 
__IO uint32_t CR
 
__IO uint32_t ISR
 
__IO uint32_t PRER
 
__IO uint32_t WUTR
 
__IO uint32_t CALIBR
 
__IO uint32_t ALRMAR
 
__IO uint32_t ALRMBR
 
__IO uint32_t WPR
 
__IO uint32_t SSR
 
__IO uint32_t SHIFTR
 
__IO uint32_t TSTR
 
__IO uint32_t TSDR
 
__IO uint32_t TSSSR
 
__IO uint32_t CALR
 
__IO uint32_t TAFCR
 
__IO uint32_t ALRMASSR
 
__IO uint32_t ALRMBSSR
 
uint32_t RESERVED7
 
__IO uint32_t BKP0R
 
__IO uint32_t BKP1R
 
__IO uint32_t BKP2R
 
__IO uint32_t BKP3R
 
__IO uint32_t BKP4R
 
__IO uint32_t BKP5R
 
__IO uint32_t BKP6R
 
__IO uint32_t BKP7R
 
__IO uint32_t BKP8R
 
__IO uint32_t BKP9R
 
__IO uint32_t BKP10R
 
__IO uint32_t BKP11R
 
__IO uint32_t BKP12R
 
__IO uint32_t BKP13R
 
__IO uint32_t BKP14R
 
__IO uint32_t BKP15R
 
__IO uint32_t BKP16R
 
__IO uint32_t BKP17R
 
__IO uint32_t BKP18R
 
__IO uint32_t BKP19R
 

Detailed Description

Real-Time Clock.

Member Data Documentation

◆ ALRMAR

__IO uint32_t RTC_TypeDef::ALRMAR

RTC alarm A register, Address offset: 0x1C

◆ ALRMASSR

__IO uint32_t RTC_TypeDef::ALRMASSR

RTC alarm A sub second register, Address offset: 0x44

◆ ALRMBR

__IO uint32_t RTC_TypeDef::ALRMBR

RTC alarm B register, Address offset: 0x20

◆ ALRMBSSR

__IO uint32_t RTC_TypeDef::ALRMBSSR

RTC alarm B sub second register, Address offset: 0x48

◆ BKP0R

__IO uint32_t RTC_TypeDef::BKP0R

RTC backup register 1, Address offset: 0x50

◆ BKP10R

__IO uint32_t RTC_TypeDef::BKP10R

RTC backup register 10, Address offset: 0x78

◆ BKP11R

__IO uint32_t RTC_TypeDef::BKP11R

RTC backup register 11, Address offset: 0x7C

◆ BKP12R

__IO uint32_t RTC_TypeDef::BKP12R

RTC backup register 12, Address offset: 0x80

◆ BKP13R

__IO uint32_t RTC_TypeDef::BKP13R

RTC backup register 13, Address offset: 0x84

◆ BKP14R

__IO uint32_t RTC_TypeDef::BKP14R

RTC backup register 14, Address offset: 0x88

◆ BKP15R

__IO uint32_t RTC_TypeDef::BKP15R

RTC backup register 15, Address offset: 0x8C

◆ BKP16R

__IO uint32_t RTC_TypeDef::BKP16R

RTC backup register 16, Address offset: 0x90

◆ BKP17R

__IO uint32_t RTC_TypeDef::BKP17R

RTC backup register 17, Address offset: 0x94

◆ BKP18R

__IO uint32_t RTC_TypeDef::BKP18R

RTC backup register 18, Address offset: 0x98

◆ BKP19R

__IO uint32_t RTC_TypeDef::BKP19R

RTC backup register 19, Address offset: 0x9C

◆ BKP1R

__IO uint32_t RTC_TypeDef::BKP1R

RTC backup register 1, Address offset: 0x54

◆ BKP2R

__IO uint32_t RTC_TypeDef::BKP2R

RTC backup register 2, Address offset: 0x58

◆ BKP3R

__IO uint32_t RTC_TypeDef::BKP3R

RTC backup register 3, Address offset: 0x5C

◆ BKP4R

__IO uint32_t RTC_TypeDef::BKP4R

RTC backup register 4, Address offset: 0x60

◆ BKP5R

__IO uint32_t RTC_TypeDef::BKP5R

RTC backup register 5, Address offset: 0x64

◆ BKP6R

__IO uint32_t RTC_TypeDef::BKP6R

RTC backup register 6, Address offset: 0x68

◆ BKP7R

__IO uint32_t RTC_TypeDef::BKP7R

RTC backup register 7, Address offset: 0x6C

◆ BKP8R

__IO uint32_t RTC_TypeDef::BKP8R

RTC backup register 8, Address offset: 0x70

◆ BKP9R

__IO uint32_t RTC_TypeDef::BKP9R

RTC backup register 9, Address offset: 0x74

◆ CALIBR

__IO uint32_t RTC_TypeDef::CALIBR

RTC calibration register, Address offset: 0x18

◆ CALR

__IO uint32_t RTC_TypeDef::CALR

RTC calibration register, Address offset: 0x3C

◆ CR

__IO uint32_t RTC_TypeDef::CR

RTC control register, Address offset: 0x08

◆ DR

__IO uint32_t RTC_TypeDef::DR

RTC date register, Address offset: 0x04

◆ ISR

__IO uint32_t RTC_TypeDef::ISR

RTC initialization and status register, Address offset: 0x0C

◆ PRER

__IO uint32_t RTC_TypeDef::PRER

RTC prescaler register, Address offset: 0x10

◆ RESERVED7

uint32_t RTC_TypeDef::RESERVED7

Reserved, 0x4C

◆ SHIFTR

__IO uint32_t RTC_TypeDef::SHIFTR

RTC shift control register, Address offset: 0x2C

◆ SSR

__IO uint32_t RTC_TypeDef::SSR

RTC sub second register, Address offset: 0x28

◆ TAFCR

__IO uint32_t RTC_TypeDef::TAFCR

RTC tamper and alternate function configuration register, Address offset: 0x40

◆ TR

__IO uint32_t RTC_TypeDef::TR

RTC time register, Address offset: 0x00

◆ TSDR

__IO uint32_t RTC_TypeDef::TSDR

RTC time stamp date register, Address offset: 0x34

◆ TSSSR

__IO uint32_t RTC_TypeDef::TSSSR

RTC time-stamp sub second register, Address offset: 0x38

◆ TSTR

__IO uint32_t RTC_TypeDef::TSTR

RTC time stamp time register, Address offset: 0x30

◆ WPR

__IO uint32_t RTC_TypeDef::WPR

RTC write protection register, Address offset: 0x24

◆ WUTR

__IO uint32_t RTC_TypeDef::WUTR

RTC wakeup timer register, Address offset: 0x14

The documentation for this struct was generated from the following files: